公开(公告)号：US12068249B2

公开(公告)日：2024-08-20

申请号：US17516588

申请日：2021-11-01

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yoshiyuki Kuroko ,  Yoshitaka Otsu

IPC: H01L23/52 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H10B41/27 ,  H10B43/27

CPC classification number: H01L23/5283 ,  H01L21/76816 ,  H01L21/76877 ,  H01L23/5226 ,  H10B41/27 ,  H10B43/27

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, memory stack structures vertically extending through the alternating stack, a perforated dielectric moat structure including a dielectric fill material and vertically extending through the alternating stack. The perforated dielectric moat structure includes, at each level of the insulating layers, two rows of lengthwise dielectric pillar portions laterally extending along a first horizontal direction and two columns of widthwise dielectric pillar portions extending along a second horizontal directions that is perpendicular to the first horizontal direction. Each row of lengthwise dielectric pillar portions has a first center-to-center pitch. Each column of widthwise dielectric pillar portions has a second center-to-center pitch. A ratio of the second center-to-center pitch to the first center-to-center pitch is in a range from 1.50 to 2.0.