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公开(公告)号:US20240264214A1
公开(公告)日:2024-08-08
申请号:US18134595
申请日:2023-04-14
发明人: Shiva Prasad Ellendula , SoundaraMohan Ponnusamy , Pradeep Tolakanahalli Nagabhushanrao , Mahendrakumar Haribhau Lipare
CPC分类号: G01R31/086 , G01R31/66
摘要: A power conditioner includes an input configured to be coupled to a main-power source and an output configured to receive power from within the power conditioner from the main-power source, a backup-power source, or both. The power conditioner includes an inverter, at least one processor, and a memory storing instructions that, when executed by the processor, cause the processor to perform a method. The method includes receiving an inverter-off signal, receiving an output-voltage level above a threshold output-voltage level, and preventing activation of the inverter in response to at least receiving the inverter-off signal and the output-voltage level above the threshold output-voltage level.