公开(公告)号：US09960234B2

公开(公告)日：2018-05-01

申请号：US14508266

申请日：2014-10-07

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Kirk Huang ,  Chun-Li Liu ,  Ali Salih

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L29/20 ,  H01L27/06 ,  H01L27/088

CPC classification number: H01L29/0696 ,  H01L27/0629 ,  H01L27/0883 ,  H01L29/2003 ,  H01L29/4236 ,  H01L29/78

Abstract: In one embodiment, a method of forming an MOS transistor includes forming a threshold voltage (Vth) of the MOS transistor to have a first value at interior portions of the MOS transistor and a second value at other locations within the MOS transistor that are distal from the interior portion wherein the second value is less than the first value.