公开(公告)号：US20240355373A1

公开(公告)日：2024-10-24

申请号：US18757528

申请日：2024-06-28

申请人： SHENZHEN PANGO MICROSYSTEMS CO.,LTD

发明人： JIN ZHANG ,  WEI DING ,  RUSHANG HUANG

IPC分类号： G11C7/22 ,  G11C7/04 ,  G11C11/4076

CPC分类号： G11C7/22 ,  G11C7/04 ,  G11C11/4076

摘要： The present application discloses a method for adjusting phase of a DQS signal, which is applied to the field of field programmable logic gate arrays and is used to solve the temperature drift problem of the DQS signal in DDR. The method provided by the present application includes: receiving a phase adjustment instruction, and adjusting phase of the DQS signal according to a preset first adjustment rule; receiving a signal sampling instruction to sample the DQS signal, and returning a sampling result of the DQS signal; determining whether the sampling result is correct, and storing a determination result; cycling steps of receiving the phase adjustment instruction to storing the determination result until a number of cycles reaches a preset number of times; according to the determination result corresponding to the number of cycles, adjusting the phase of the DQS signal according to a preset second adjustment rule.