公开(公告)号：US20120047414A1

公开(公告)日：2012-02-23

申请号：US12892199

申请日：2010-09-28

申请人： SHUENN-GI LEE ,  CHUNG HSUAN WANG ,  WERN-HO SHEEN

发明人： SHUENN-GI LEE ,  CHUNG HSUAN WANG ,  WERN-HO SHEEN

IPC分类号： H03M13/05 ,  G06F11/08

CPC分类号： H03M13/2739 ,  H03M13/2764 ,  H03M13/2775

摘要： An address generation apparatus for quadratic permutation polynomial (QPP) interleaver receives several configurable parameters and uses a plurality of QPP units to compute and outputs a plurality of interleaving addresses according to a QPP function Π(i)=(f1i+f2i2) mod k, where f1 and f2 are QPP coefficients, k is information block length of an input sequence, 0≦i≦k−1, and mod is a modulus operation. Each of the plurality of QPP units is a parallel computation unit, and outputs in parallel a corresponding group of interleaver addresses, where Π(i) is also a ith interleaving address generated by the apparatus.

摘要翻译： 二次置换多项式（QPP）交织器的地址生成装置接收多个可配置参数，并使用多个QPP单元根据QPP函数＆Pgr计算并输出多个交织地址;（i）=（f1i + f2i2）mod k ，其中f1和f2是QPP系数，k是输入序列的信息块长度，0＆nlE; i＆nlE; k-1，mod是模运算。 多个QPP单元中的每一个是并行计算单元，并且并行地输出相应的交织器地址组，其中＆amp;（i）也是由该设备生成的第i个交织地址。