公开(公告)号：US20140117537A1

公开(公告)日：2014-05-01

申请号：US13729759

申请日：2012-12-28

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Chen-Han Lin ,  Kuo-Hsiang Li ,  Jung-Pang Huang ,  Nan-Jia Huang ,  Hsin-Yi Liao

IPC: H01L23/498 ,  H01L21/56

CPC classification number: H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2924/3511 ,  H01L2924/00

Abstract: Disclosed is a semiconductor package including an encapsulant having a top surface and a bottom surface opposite to the top surface; a semiconductor chip embedded in the encapsulant having an active surface, an inactive surface opposite to the active surface, and lateral surfaces interconnecting the active surface and the inactive surface, wherein the active surface protrudes from the bottom surface of the encapsulant and the semiconductor chip further has a plurality of electrode pads disposed on the active surface; a positioning member layer formed on a portion of the bottom surface of the encapsulant, covering the lateral surfaces of the semiconductor chip that protrude therefrom, and exposing the active surface; and a build-up trace structure disposed on the active surface of the semiconductor chip and the positioning member layer formed on the bottom surface of the encapsulant. The present invention also provides a method of fabricating a semiconductor package.

Abstract translation: 公开了一种半导体封装，其包括具有顶表面和与顶表面相对的底表面的密封剂; 嵌入密封剂中的半导体芯片具有活性表面，与活性表面相对的非活性表面以及将活性表面和非活性表面互连的侧表面，其中活性表面从密封剂的底表面和半导体芯片进一步突出 具有设置在有源表面上的多个电极焊盘; 定位构件层，形成在所述密封剂的底面的一部分上，覆盖从其突出的半导体芯片的侧表面，并露出所述活性表面; 以及设置在半导体芯片的有源表面上的积聚迹线结构和形成在密封剂的底表面上的定位构件层。 本发明还提供一种制造半导体封装的方法。