公开(公告)号：US12248702B2

公开(公告)日：2025-03-11

申请号：US18151429

申请日：2023-01-07

Applicant: SK hynix Inc.

Inventor： Tae Ho Lim ,  Ie Ryung Park ,  Dong Sop Lee ,  Youn Won Park ,  Jae Min Jang

IPC: G06F3/06

Abstract: A memory controller includes a plurality of processors, a memory device and a memory manager. The memory device includes a plurality of segments, which are divided into a plurality of segment groups, to which group identifiers are respectively assigned. The memory manager is configured to map a first buffer identifier to a first group identifier from among the group identifiers, select one or more segments only from a first segment group, to which the first group identifier is assigned among the plurality of segment groups, map the first buffer identifier to the one or more segments, and allocate, to a first processor from among the plurality of processors, the first buffer identifier and the one or more segments.