公开(公告)号：US09136869B2

公开(公告)日：2015-09-15

申请号：US14054586

申请日：2013-10-15

Applicant: STMICROELECTRONICS, INC.

Inventor： Hakan C. Ozdemir ,  Razmik Karabed ,  Richard Barndt ,  Kuhong Jeong

IPC: H03M7/46 ,  G11B20/14 ,  H03M5/14 ,  G11B5/09

CPC classification number: H03M7/46 ,  G11B5/09 ,  G11B20/1403 ,  H03M5/145

Abstract: A system and method for encoding a stream of bits with a run-length limited high-rate reverse order encoding schema. According to one embodiment, an RLL encoding block includes a receiver having a precoder operable to receive a stream of N-bits having symbols of M-bits in length, a histogram operable to identify an index symbol of M-bits that does not occur within the received stream of N-bits. It is this index symbol that may be used as the key to encoding a block of symbols so as to ensure unique decodability when RLL decoding. Finally, an encoder operable to perform an exclusive-or operation on each symbol with the next symbol stored in the stream. Such an encoding system only adds one symbol of M bits in length to a block of N bits and still results in a stream of bits sufficient to support high-rate requirements and strict timing loop control.

Abstract translation: 一种用游程长度有限的高速逆序编码模式来编码比特流的系统和方法。 根据一个实施例，RLL编码块包括具有预编码器的接收机，该预编码器可用于接收具有长度为M比特符号的N比特流，可用于识别不存在于M比特内的M比特的索引符号的直方图 接收的N位流。 可以将该索引符号用作编码符号块的关键，以便在RLL解码时确保唯一的可解码性。 最后，编码器可操作以对存储在流中的下一个符号执行对每个符号的异或运算。 这样的编码系统仅将一个长度为M位的符号添加到N位块，并且仍然产生足以支持高速率要求和严格的定时环控制的位流。