公开(公告)号：US09405511B2

公开(公告)日：2016-08-02

申请号：US14524774

申请日：2014-10-27

Applicant: STMICROELECTRONICS (CANADA), INC. ,  STMICROELECTRONICS S.r.l.

Inventor： John Hogeboom ,  Hock Khor ,  Matteo Alessio Traldi ,  Anton Pelteshki

IPC: H03H7/06 ,  G06F7/72 ,  H03H17/06 ,  G06F5/16 ,  H04L25/02

CPC classification number: G06F7/724 ,  G06F5/16 ,  H03H17/06 ,  H04L25/0272 ,  H04L25/0288

Abstract: A FIR transmit architecture uses multiple driver divisions to allow signals with different delays to be summed into the output signal by the driver itself. The architecture includes a first multiplexer, a plurality of delay cells, a plurality of sign blocks, a switch block, a second multiplexer, and a plurality of drivers.

Abstract translation: FIR发送架构使用多个驱动器分区，以允许具有不同延迟的信号被驱动器自身求和到输出信号中。 该架构包括第一多路复用器，多个延迟单元，多个符号块，开关块，第二多路复用器和多个驱动器。