公开(公告)号：US20200313846A1

公开(公告)日：2020-10-01

申请号：US16810434

申请日：2020-03-05

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Ibrahima DIOP ,  Yanis LINGE

IPC: H04L9/00 ,  G06F7/525 ,  G06F7/504 ,  G06F7/72

Abstract: Cryptographic circuitry, in operation, performs a calculation on a first number and a second number. The performing of the calculation is protected by breaking the second number into a plurality of third numbers, a sum of values of the third numbers being equal to a value of the second number. The calculation is performed bit by bit for each rank of the third numbers. Functional circuitry, coupled to the cryptographic circuitry, uses a result of the calculation.

公开(公告)号：US20190034629A1

公开(公告)日：2019-01-31

申请号：US16041077

申请日：2018-07-20

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Ibrahima DIOP ,  Yanis LINGE ,  Pierre-Yvan LIARDET

IPC: G06F21/55 ,  G06F7/72 ,  G06F21/60

Abstract: An iterative calculation is performed on a first number and a second number, while protecting the iterative calculation against side-channel attacks. For each bit of the second number, successively, an iterative calculation routine of the bit of the second number is determined. The determination is made independent of a state of the bit. The determined iterative calculation routine of the bit is executed. A result of the iterative calculation is generated based on a result of the execution of the determined iterative calculation routine of a last bit of the second number.