公开(公告)号：US20020171460A1

公开(公告)日：2002-11-21

申请号：US10101561

申请日：2002-03-19

Applicant: STMICROELECTRONICS S.A.

Inventor： Luc Garcia

IPC: H03B019/00

CPC classification number: H03D3/007

Abstract: A sinusoidal signal multiplier circuit produces an output sinusoidal signal substantially without any DC component. This sinusoidal signal multiplier circuit includes a first multiplication cell receiving a first sinusoidal signal at a first input and a second sinusoidal signal at a second input. The first multiplication cell delivers a first output signal. The sinusoidal signal multiplier circuit also includes a second multiplication cell, identical to the first multiplication cell, that receives the second sinusoidal signal at its first input and the first sinusoidal signal at its second input, and delivers a second output signal. The sinusoidal signal multiplier circuit also includes an adder circuit to add the first output signal and the second output signal to provide from the sinusoidal signal multiplier circuit an output signal substantially without any DC component.

Abstract translation: 正弦信号乘法器电路基本上没有任何DC分量产生输出正弦信号。 该正弦信号乘法器电路包括在第一输入处接收第一正弦信号的第一乘法单元和第二输入端的第二正弦信号。 第一乘法单元传送第一输出信号。 正弦信号乘法器电路还包括与第一乘法单元相同的第二乘法单元，其在其第一输入处接收第二正弦信号，并在其第二输入端接收第一正弦信号，并传送第二输出信号。 正弦信号乘法器电路还包括加法器电路，用于将第一输出信号和第二输出信号相加，以从正弦信号乘法器电路提供基本上没有任何DC分量的输出信号。

公开(公告)号：US20020168028A1

公开(公告)日：2002-11-14

申请号：US10103575

申请日：2002-03-21

Applicant: STMICROELECTRONICS S.A.

Inventor： Marc Joisson ,  Luc Garcia ,  Marc Gens

IPC: H03K009/00

CPC classification number: H04L27/1566

Abstract: A receiver of a frequency-modulated signal is provided. The receiver includes a frequency-transposition unit for lowering the frequency of the frequency-modulated signal, and a digital demodulator for regenerating a digital signal from the frequency-transposed signal. The frequency-transposition unit includes a local oscillator for generating a local oscillator signal used in lowering the frequency of the frequency-modulated signal. The frequency-transposed signal is sampled in the digital demodulator at the rate of a sampling signal, and the sampling signal is generated by the local oscillator of the frequency-transposition unit. In a preferred embodiment, the local oscillator includes at least one frequency-divider circuit that delivers the sampling signal. Also provided is a method for regenerating a digital signal from a frequency-modulated signal.

Abstract translation: 提供了调频信号的接收机。 接收机包括用于降低频率调制信号的频率的频率转置单元和用于从频率转置信号再生数字信号的数字解调器。 频率转置单元包括本地振荡器，用于产生用于降低频率调制信号的频率的本地振荡器信号。 在数字解调器中以采样信号的速率采样频移信号，采样信号由频移单元的本地振荡器产生。 在优选实施例中，本地振荡器包括传送采样信号的至少一个分频器电路。 还提供了一种从频率调制信号再生数字信号的方法。

公开(公告)号：US20030118129A1

公开(公告)日：2003-06-26

申请号：US10153000

申请日：2002-05-22

Applicant: STMICROELECTRONICS S.A.

Inventor： Marc Joisson ,  Luc Garcia ,  Sebastien Leveque

IPC: H03D003/00 ,  H04L027/14 ,  H04B001/16

CPC classification number: H04L27/1563

Abstract: A receiver of a frequency-modulated signal representing a digital signal includes a down conversion unit or frequency translation unit to lower the frequency of the frequency-modulated signal and a digital demodulator to regenerate the digital signal from the lowered-frequency signal. The receiver furthermore includes a counter circuit to determine the number of periods of a reference signal from the frequency translation unit during a period of the lowered-frequency signal. The digital demodulator includes a computer unit to compute the period of the lowered-frequency signal from the number of periods of the reference signal.

Abstract translation: 表示数字信号的频率调制信号的接收机包括降频变频单元或频率转换单元，以降低频率调制信号的频率，以及数字解调器，以从低频信号再生数字信号。 接收器还包括一个计数器电路，用于在降频信号的周期期间确定来自频率转换单元的参考信号的周期数。 数字解调器包括计算机单元，用于根据参考信号的周期数来计算降频信号的周期。