公开(公告)号：US20230121961A1

公开(公告)日：2023-04-20

申请号：US17960064

申请日：2022-10-04

Applicant: STMICROELECTRONICS S.r.l. ,  STMICROELECTRONICS (ROUSSET) SAS

Inventor： Rosalia GERMANA-CARPINETO ,  Lia MASOERO ,  Luigi INNACOLO

IPC: H01L29/10 ,  H01L29/40 ,  H01L29/78 ,  H01L21/265 ,  H01L29/66

Abstract: The present disclosure relates to an electronic device comprising a semiconductor substrate and transistors having their gates contained in trenches extending in the semiconductor substrate, each transistor comprising a doped semiconductor well of a first conductivity type, the well being buried in the semiconductor substrate and in contact with two adjacent trenches among said trenches, a first doped semiconductor region of a second conductivity type, covering the well, in contact with the well, and in contact with the two adjacent trenches, a second doped semiconductor region of the second conductivity type more heavily doped than the first semiconductor region, extending in the first semiconductor region, and a third doped semiconductor region of the first conductivity type, more heavily doped than the well, covering the well, in contact with the first region, and extending in the semiconductor substrate in contact with the well.