公开(公告)号：US09443801B2

公开(公告)日：2016-09-13

申请号：US14673300

申请日：2015-03-30

Applicant: STMicroelectronics, Inc.

Inventor： Hai Ding ,  Fuchao Wang ,  Zhiyong Xie

IPC: H01L21/4763 ,  H01L23/525 ,  H01L21/768 ,  H01L27/108

CPC classification number: H01L23/5256 ,  H01L21/76892 ,  H01L23/5258 ,  H01L27/10894 ,  H01L2924/0002 ,  Y02E60/12 ,  H01L2924/00

Abstract: Methods of fabricating a multi-layer semiconductor structure are provided. In one embodiment, a method includes depositing a first dielectric layer over a semiconductor structure, depositing a first metal layer over the first dielectric layer, patterning the first metal layer to form a plurality of first metal lines, and depositing a second dielectric layer over the first metal lines and the first dielectric layer. The method also includes removing a portion of the second dielectric layer over selected first metal lines to expose a respective top surface of each of the selected first metal lines. The method further includes reducing a thickness of the selected first metal lines to be less than a thickness of the unselected first metal lines. A multi-layer semiconductor structure is also provided.

公开(公告)号：US20150206839A1

公开(公告)日：2015-07-23

申请号：US14673300

申请日：2015-03-30

Applicant: STMicroelectronics, Inc.

Inventor： Hai Ding ,  Fuchao Wang ,  Zhiyong Xie

IPC: H01L23/525 ,  H01L21/768

CPC classification number: H01L23/5256 ,  H01L21/76892 ,  H01L23/5258 ,  H01L27/10894 ,  H01L2924/0002 ,  Y02E60/12 ,  H01L2924/00

Abstract: Methods of fabricating a multi-layer semiconductor structure are provided. In one embodiment, a method includes depositing a first dielectric layer over a semiconductor structure, depositing a first metal layer over the first dielectric layer, patterning the first metal layer to form a plurality of first metal lines, and depositing a second dielectric layer over the first metal lines and the first dielectric layer. The method also includes removing a portion of the second dielectric layer over selected first metal lines to expose a respective top surface of each of the selected first metal lines. The method further includes reducing a thickness of the selected first metal lines to be less than a thickness of the unselected first metal lines. A multi-layer semiconductor structure is also provided.

Abstract translation: 提供制造多层半导体结构的方法。 在一个实施例中，一种方法包括在半导体结构上沉积第一介电层，在第一介电层上沉积第一金属层，图案化第一金属层以形成多个第一金属线，以及在第 第一金属线和第一介电层。 该方法还包括在所选择的第一金属线上去除第二电介质层的一部分以暴露每个所选择的第一金属线的相应顶表面。 该方法还包括将所选择的第一金属线的厚度减小到小于未选择的第一金属线的厚度。 还提供了多层半导体结构。