Sharing memory access by multiple controllers having different bus widths
    1.
    发明申请
    Sharing memory access by multiple controllers having different bus widths 有权
    由具有不同总线宽度的多个控制器共享内存访问

    公开(公告)号:US20020010841A1

    公开(公告)日:2002-01-24

    申请号:US09972548

    申请日:2001-10-05

    Inventor: Fabrizio Rovati

    CPC classification number: G06F13/1678

    Abstract: There is disclosed a method and circuit for allowing access to a shared memory by at least two controllers having different bus widths. Such method and circuit provides particular advantages in its application to controlling access to a shared memory in a digital set-top-box of a digital television receiver. An arbiter is provided to access between memory accesses by first and second memory access circuitry. The first memory access circuitry accesses a block of data in the shared memory, and the second memory access circuitry accesses two blocks of data in each memory access. Each second memory write access comprises reading blocks of data from first and second memory locations and then writing blocks of data to first and second memory locations.

    Abstract translation: 公开了一种用于允许具有不同总线宽度的至少两个控制器访问共享存储器的方法和电路。 这种方法和电路在其用于控制​​对数字电视接收机的数字机顶盒中的共享存储器的访问方面提供了特别的优点。 提供仲裁器以访问由第一和第二存储器访问电路进行的存储器访问。 第一存储器访问电路访问共享存储器中的数据块,并且第二存储器访问电路在每个存储器访问中访问两个数据块。 每个第二存储器写访问包括从第一和第二存储器位置读取数据块,然后将数据块写入第一和第二存储器位置。

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