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公开(公告)号:US20140375357A1
公开(公告)日:2014-12-25
申请号:US13926748
申请日:2013-06-25
Inventor: Vinod KUMAR , Pradeep Kumar BADRATHWAL , Saiyid Mohammad Irshad RIZVI , Paras GARG , Kallol CHATTERJEE , Pierre DAUTRICHE
IPC: H03K19/003
CPC classification number: H03K19/00384
Abstract: A circuit having a centralized PT compensation circuit to provide compensation signals to localized I/O blocks on the chip. Process variations and temperature variations tend to be approximately uniform across an integrated circuit chip. Thus, a single, centralized PT compensation circuit may be used instead of one PT compensation circuit per I/O section as with solutions of the past. Further, the PT compensation circuit may generate a digital code indicative of the effects of process and temperature. Further yet, each section of I/O block may have a local voltage compensation circuit to compensate the voltage variation of the I/O block. The voltage compensation circuit utilizes an independent reference voltage. The reference voltage is generated by the PT compensation circuit, which is placed centrally in the IC chip and hence any need to repeat the reference generation for each I/O block is eliminated.
Abstract translation: 具有集中PT补偿电路以向芯片上的局部I / O块提供补偿信号的电路。 整个集成电路芯片的工艺变化和温度变化趋向于大致均匀。 因此,与过去的解决方案一样,可以使用单个集中式PT补偿电路来代替每个I / O部分的一个PT补偿电路。 此外,PT补偿电路可以产生指示过程和温度的影响的数字代码。 此外,I / O块的每个部分可以具有用于补偿I / O块的电压变化的局部电压补偿电路。 电压补偿电路采用独立的参考电压。 参考电压由放置在IC芯片中央的PT补偿电路产生,因此不需要重复每个I / O块的参考生成。