公开(公告)号：US20220069811A1

公开(公告)日：2022-03-03

申请号：US17412991

申请日：2021-08-26

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Denis COTTIN ,  Fabrice ROMAIN

IPC: H03K3/356 ,  H03K19/0185 ,  G09G3/3225

Abstract: An output potential level among two first levels is delivered according to an input level among two second levels. The output potential level is delivered at a first node connecting together first and second transistors electrically in series between two second nodes of application of the first levels. A first DC voltage defining a high limit for the control voltage of the first transistor is delivered by a first voltage generator powered by one of the second nodes. A second DC voltage defining a high limit for the control voltage of the second transistor is delivered by a second voltage generator controlled by a value representative of the first voltage and powered between the second nodes.

公开(公告)号：US20250030408A1

公开(公告)日：2025-01-23

申请号：US18909260

申请日：2024-10-08

Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

Inventor： Denis COTTIN ,  Fabrice ROMAIN

IPC: H03K3/356 ,  G09G3/3225 ,  H03K19/0185

Abstract: An output potential level among two first levels is delivered according to an input level among two second levels. The output potential level is delivered at a first node connecting together first and second transistors electrically in series between two second nodes of application of the first levels. A first DC voltage defining a high limit for the control voltage of the first transistor is delivered by a first voltage generator powered by one of the second nodes. A second DC voltage defining a high limit for the control voltage of the second transistor is delivered by a second voltage generator controlled by a value representative of the first voltage and powered between the second nodes.