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公开(公告)号:US11916480B2
公开(公告)日:2024-02-27
申请号:US17495306
申请日:2021-10-06
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: Vincent Pinon
CPC classification number: H02M3/158 , H02M1/08 , H02M1/0045
Abstract: In an embodiment, A switched-mode power supply includes: a first node; a second node configured to receive a DC input voltage; a third node configured to receive a reference voltage; first and second switching transistors; a first circuit configured to control the first switching transistor; and a second circuit configured to control the second switching transistor, wherein the switched-mode power supply is configured to deliver a regulated output voltage at the first node from the DC input voltage, and wherein the first and second circuits are configured to be powered from the output voltage.
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公开(公告)号:US11196419B2
公开(公告)日:2021-12-07
申请号:US16870276
申请日:2020-05-08
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: Vincent Pinon
IPC: H03K19/0175 , H03K19/0185 , H03K3/356 , H03K19/003
Abstract: A voltage level shifter device an input stage and an output stage. The input stage is configured to lower one of the first and second output terminals to the low level according to the level of the input voltage. A latch circuit includes a first branch having a first PMOS transistor and a second PMOS transistor coupled in series coupled between a shifted-high-level voltage supply terminal and the first output terminal and a second branch having a third PMOS transistor an a fourth PMOS transistor coupled in series between the shifted-high-level voltage supply terminal and the second output terminal. The first output terminal is a gate of the second PMOS transistor and to a gate of the third PMOS transistor. The second output terminal is coupled a gate of the fourth PMOS transistor and to a gate of the first PMOS transistor.
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公开(公告)号:US20220109370A1
公开(公告)日:2022-04-07
申请号:US17495306
申请日:2021-10-06
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: Vincent Pinon
Abstract: In an embodiment, A switched-mode power supply includes: a first node; a second node configured to receive a DC input voltage; a third node configured to receive a reference voltage; first and second switching transistors; a first circuit configured to control the first switching transistor; and a second circuit configured to control the second switching transistor, wherein the switched-mode power supply is configured to deliver a regulated output voltage at the first node from the DC input voltage, and wherein the first and second circuits are configured to be powered from the output voltage.
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公开(公告)号:US20210270909A1
公开(公告)日:2021-09-02
申请号:US17123210
申请日:2020-12-16
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: Vincent Pinon
Abstract: A circuit includes a voltage comparator with an output, a first input and a second input, the first input being coupled to a first reference voltage terminal. An operational transconductance amplifier has an output coupled to the second input of the voltage comparator, an inverting input coupled to the output of the operational transconductance amplifier, and a non-inverting input coupled to a second reference voltage terminal. A filter capacitor is coupled in series between a power supply terminal and the second input of the voltage comparator.
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公开(公告)号:US11460515B2
公开(公告)日:2022-10-04
申请号:US17123210
申请日:2020-12-16
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: Vincent Pinon
Abstract: A circuit includes a voltage comparator with an output, a first input and a second input, the first input being coupled to a first reference voltage terminal. An operational transconductance amplifier has an output coupled to the second input of the voltage comparator, an inverting input coupled to the output of the operational transconductance amplifier, and a non-inverting input coupled to a second reference voltage terminal. A filter capacitor is coupled in series between a power supply terminal and the second input of the voltage comparator.
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