公开(公告)号：US10996699B2

公开(公告)日：2021-05-04

申请号：US16525696

申请日：2019-07-30

Applicant: STMicroelectronics Asia Pacific Pte Ltd

Inventor： Qing Liu ,  Yannick Guedon

IPC: G05F1/575 ,  H03F3/45

Abstract: A low drop-out (LDO) voltage regulator circuit includes a power transistor having a control terminal configured to receive a control signal and an output terminal coupled to an output node. A current regulation loop senses current flowing through the power transistor and modulates the control signal to cause the power transistor to output a constant current to the output node. A voltage regulation loop senses voltage at the output node and modulates the control signal to cause the power transistor to deliver current to the output node so that an output voltage at the output node is regulated. The current regulation loop includes a bipolar transistor connected to the control terminal of the power transistor, where a base terminal of the bipolar transistor is driven by a signal dependent on a difference between the sensed current flowing through the power transistor and a reference.