公开(公告)号：US20240178053A1

公开(公告)日：2024-05-30

申请号：US18514770

申请日：2023-11-20

Applicant: STMicroelectronics France ,  STMicroelectronics (Crolles 2) SAS

Inventor： Houssein El Dirani ,  Marouane Mastari ,  Mohamed Ali Nsibi

IPC: H01L21/762 ,  H01L23/522

CPC classification number: H01L21/76224 ,  H01L23/5226 ,  H01L23/5227

Abstract: The integrated circuit includes a semiconductor substrate having a front face including isolation structures that extend vertically into the substrate from the front face as far as a first depth, and an interconnection part comprising metal levels incorporating at least one passive component, above the front face of the substrate. The integrated circuit further includes a dielectric structure that is vertically aligned with the position of the at least one passive component, and that extends vertically into the substrate from the front face as far as a second depth that is greater than the first depth.