公开(公告)号：US20240356784A1

公开(公告)日：2024-10-24

申请号：US18639419

申请日：2024-04-18

Applicant: STMicroelectronics International N.V.

Inventor： Nicolas Moeneclaey ,  Gilles Troussel ,  Christophe Tourniol

IPC: H04L25/02 ,  H04L12/40

CPC classification number: H04L25/026 ,  H04L12/40013 ,  H04L25/0272 ,  H04L25/0292 ,  H04L2012/40215

Abstract: The present disclosure relates to device including first and second terminals connected to a bus, third and fourth terminals connected to power supply and reference potentials. A first transistor and a first resistor are in series between the first terminal and a first diode connected to the third terminal. A second resistor, a second transistor and a second diode are in series between the first and fourth terminals. A third transistor and a third resistor are in series between the first diode and the second terminal. A fourth resistor, a fourth transistor and a third diode are in series between the second and fourth terminals. At each consecutive transmission of a dominant bit and of a recessive bit, a circuit sets the transistors at the ON state during a time period starting with the recessive bit.

公开(公告)号：US20250030577A1

公开(公告)日：2025-01-23

申请号：US18762760

申请日：2024-07-03

Applicant: STMicroelectronics International N.V.

Inventor： Nicolas Moeneclaey ,  Gilles Troussel ,  Christophe Tourniol

IPC: H04L12/40 ,  H02M7/219

Abstract: A device includes first and second terminals configured to be respectively connected to first and second conductors of a differential two-wire bus. First and second identical resistive dividing bridges are connected between a reference node and respectively first and second nodes. Third and fourth identical resistive dividing bridges are connected between a supply node and respectively the first and second nodes. A reading circuit is configured to determine a binary state of the bus from the currents flowing through transistors of the reading circuit.