FULLY INTEGRATED CIRCUIT FOR GENERATING A RAMP SIGNAL
    1.
    发明申请
    FULLY INTEGRATED CIRCUIT FOR GENERATING A RAMP SIGNAL 有权
    用于产生RAMP信号的完全集成电路

    公开(公告)号:US20130169324A1

    公开(公告)日:2013-07-04

    申请号:US13648557

    申请日:2012-10-10

    CPC classification number: H03K4/502

    Abstract: A fully integrated ramp generator circuit includes a first current generator that sources current to first capacitor through a first transistor that is gate controlled by the complement of a periodic signal. The ramping voltage stored on the first capacitor is buffered to an output node as a ramp output signal. A second transistor couples the output node to the first current generator and is gate controlled by the periodic signal. The periodic signal is generated at the output of a flip-flop that receives an input clock signal and reset signal. The reset signal is generated by a comparator circuit operable to compare the voltage on a second capacitor to a reference. The second capacitor is charged by a second current source and discharged by a third transistor that is gate controlled by the periodic signal.

    Abstract translation: 完全集成的斜坡发生器电路包括第一电流发生器,其通过由周期信号的补码门控制的第一晶体管向第一电容器供电。 存储在第一电容器上的斜坡电压作为斜坡输出信号被缓冲到输出节点。 第二晶体管将输出节点耦合到第一电流发生器,并由周期信号进行栅极控制。 周期性信号在接收输入时钟信号和复位信号的触发器的输出端产生。 复位信号由比较器电路产生,比较器电路可操作以将第二电容器上的电压与参考电压进行比较。 第二电容器由第二电流源充电,并由被周期信号门控制的第三晶体管放电。

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