-
公开(公告)号:US20230384459A1
公开(公告)日:2023-11-30
申请号:US18312157
申请日:2023-05-04
Applicant: STMicroelectronics S.r.I.
Inventor: Gaetano Rivela
CPC classification number: G01S19/243 , G01S19/04
Abstract: In accordance with an embodiment, a system includes a phase-locked loop (PLL) configured to provide a first local oscillator (LO) signal and a voltage-controlled oscillator (VCO) signal; a first quadrature demodulator configured to downconvert global navigation satellite system signals to produce a first intermediate frequency (IF) signal; a first signal processing chain configured to pass the first IF signal; a second signal processing chain comprising a first frequency divider configured to produce a second LO signal based on the first LO signal, and a second quadrature demodulator configured to convert the first IF signal to a second IF signal using the second LO signal; and a third signal processing chain comprising a second frequency divider configured to produce a third LO signal based on the VCO signal, and a third quadrature demodulator configured to convert the first IF signal to a third IF signal using the third LO signal.