Process for manufacturing non-volatile memory cells integrated on a semiconductor substrate
    1.
    发明申请
    Process for manufacturing non-volatile memory cells integrated on a semiconductor substrate 失效
    用于制造集成在半导体衬底上的非易失性存储单元的工艺

    公开(公告)号:US20030092237A1

    公开(公告)日:2003-05-15

    申请号:US10325289

    申请日:2002-12-20

    CPC classification number: H01L27/11521

    Abstract: A method is provided for manufacturing electronic non-volatile memory devices on a semiconductor substrate including a matrix of memory cells having floating gate regions formed on respective active areas and an oxide layer separating the active areas. The method may include forming sidewalls of the floating gate regions that are slanted with respect to a surface of the semiconductor substrate, forming a trench in the oxide layer following the formation of the floating gate regions, and forming a plug of polycrystalline silicon in the trench. The slanted sidewalls of the floating gate regions provide a lead-in for the formation of upper layers.

    Abstract translation: 提供了一种用于在半导体衬底上制造电子非易失性存储器件的方法,该半导体衬底包括具有形成在各自的有源区上的浮动栅极区域和分离有源区域的氧化物层的存储器单元的矩阵。 该方法可以包括形成相对于半导体衬底的表面倾斜的浮动栅极区域的侧壁,在形成浮动栅极区域之后在氧化物层中形成沟槽,以及在沟槽中形成多晶硅插塞 。 浮动栅极区域的倾斜侧壁提供用于形成上层的引入。

    Process for manufacturing non-volatile memory cells integrated on a semiconductor substrate
    2.
    发明申请
    Process for manufacturing non-volatile memory cells integrated on a semiconductor substrate 有权
    用于制造集成在半导体衬底上的非易失性存储单元的工艺

    公开(公告)号:US20010016379A1

    公开(公告)日:2001-08-23

    申请号:US09750449

    申请日:2000-12-28

    CPC classification number: H01L27/11521

    Abstract: A method is provided for manufacturing electronic non-volatile memory devices on a semiconductor substrate including a matrix of memory cells having floating gate regions formed on respective active areas and an oxide layer separating the active areas. The method may include forming sidewalls of the floating gate regions that are slanted with respect to a surface of the semiconductor substrate, forming a trench in the oxide layer following the formation of the floating gate regions, and forming a plug of polycrystalline silicon in the trench. The slanted sidewalls of the floating gate regions provide a lead-in for the formation of upper layers.

    Abstract translation: 提供了一种用于在半导体衬底上制造电子非易失性存储器件的方法,该半导体衬底包括具有形成在各自的有源区上的浮动栅极区域和分离有源区域的氧化物层的存储器单元的矩阵。 该方法可以包括形成相对于半导体衬底的表面倾斜的浮动栅极区域的侧壁,在形成浮动栅极区域之后在氧化物层中形成沟槽,以及在沟槽中形成多晶硅插塞 。 浮动栅极区域的倾斜侧壁提供用于形成上层的引入。

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