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公开(公告)号:US11837953B2
公开(公告)日:2023-12-05
申请号:US17869508
申请日:2022-07-20
Applicant: STMicroelectronics S.r.l.
Inventor: Alessandro Dago , Alessandro Gasparini , Osvaldo Enrico Zambetti , Salvatore Levantino , Massimo Antonio Ghioni
CPC classification number: H02M3/00 , H02M1/007 , H02J2207/20
Abstract: First and second circuit branches are coupled between an input node and ground. Each circuit branch includes a series coupling first-fourth transistors in a current flow path with an output node. A first capacitor is coupled between a first capacitor node and a second capacitor node intermediate the first transistor and the second transistor in the first circuit branch. A second capacitor is coupled between a third capacitor node and a fourth capacitor node intermediate the first transistor and the second transistor in the second circuit branch. An inter-branch circuit block between the first and second branches includes a first inter-branch transistor coupled between the first capacitor node in the first circuit branch and the fourth capacitor node in the second circuit branch and a second inter-branch transistor coupled between the third capacitor node in the second circuit branch and the second capacitor node in the first circuit branch.