公开(公告)号：US20020133243A1

公开(公告)日：2002-09-19

申请号：US10036300

申请日：2001-12-26

Applicant: STMicroelectronics S.r.l.

Inventor： Salvatore Abbisso ,  Riccardo Caponetto ,  Olga Diamante ,  Domenico Porto ,  Eusebio Di Cola ,  Luigi Fortuna

IPC: G06F015/18

CPC classification number: G05B11/42 ,  G05B13/027

Abstract: A circuit implementing a non-integer order dynamic system includes a neural network that receives at least one input signal and generates therefrom at least one output signal. The input and output signals are related to each by a non-integer order integro-differential relationship through the coefficients of the neural network. A plurality of such circuits, implementing respective non-integer order controllers can be interconnected in an arrangement wherein any of the integral or differential blocks included in one of these circuits generates a signal which is fed to any of the integral or differential blocks of another circuit in the system.

Abstract translation: 实现非整数阶动态系统的电路包括接收至少一个输入信号并从其产生至少一个输出信号的神经网络。 输入和输出信号通过神经网络的系数与非整数阶积分关系相关。 实现相应的非整数顺序控制器的多个这样的电路可以以这样的布置互连，其中包括在这些电路之一中的积分或差分块中的任何一个产生一个信号，该信号被馈送到另一个电路的任何积分或差分块 在系统中。