公开(公告)号：US20020185677A1

公开(公告)日：2002-12-12

申请号：US10202076

申请日：2002-07-23

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Patti ,  Francesco Priolo ,  Vittorio Privitera ,  Giorgia Franzo

IPC: H01L021/8238

CPC classification number: H01L29/0804 ,  H01L21/8234

Abstract: An electronic power device is integrated on a semiconductor substrate having a first conductivity type, on which an epitaxial layer of the same conductivity type is grown. The power device comprises a power stage and a control stage, this latter enclosed in an isolated region having a second conductivity type. The power stage comprises a first buried area having the second conductivity type and a second buried area, partially overlapping the first buried area and having the first conductivity type. The control stage comprises a third buried area, having the second conductivity type, and a fourth buried area, partially overlapped to the third buried area and having the first conductivity type. Said first, second, third and fourth buried areas are formed in the epitaxial layers at a depth sufficient to allow the power stage and the control stage to be entirely formed in the epitaxial layer.

Abstract translation: 电子功率器件集成在具有第一导电类型的半导体衬底上，在其上生长相同导电类型的外延层。 功率器件包括功率级和控制级，后者封装在具有第二导电类型的隔离区中。 功率级包括具有第二导电类型的第一掩埋区域和与第一掩埋区域部分重叠并且具有第一导电类型的第二掩埋区域。 控制级包括具有第二导电类型的第三掩埋区域和与第三掩埋区域重叠并且具有第一导电类型的第四掩埋区域。 所述第一，第二，第三和第四掩埋区域以足以允许功率级和控制级整体形成在外延层中的深度形成在外延层中。