公开(公告)号：US20040132260A1

公开(公告)日：2004-07-08

申请号：US10714440

申请日：2003-11-14

Applicant: STMicroelectronics SA

Inventor： Damien Lenoble

IPC: H01L021/336

CPC classification number: H01L29/6659 ,  H01L21/26513 ,  H01L21/2658 ,  H01L21/26586 ,  H01L29/1083 ,  H01L29/665

Abstract: A process for fabricating an integrated circuit includes forming a gate on a crystalline silicon substrate, and amorphizing a region of the substrate to obtain an amorphous silicon region. Dopant is implanted in a subregion lying substantially within the amorphous silicon region of the substrate to form drain and source extensions. A source and drain are then formed at a low temperature.

Abstract translation: 一种用于制造集成电路的工艺包括在晶体硅衬底上形成栅极，并使基片的区域非晶化以获得非晶硅区域。 掺杂剂被植入在基本上位于衬底的非晶硅区域内的子区域中以形成漏极和源极延伸。 然后在低温下形成源极和漏极。