公开(公告)号：US11644862B2

公开(公告)日：2023-05-09

申请号：US17199786

申请日：2021-03-12

Applicant: Synaptics Incorporated

Inventor： Jeremy Roberson ,  David Sobel

IPC: G06F1/12

CPC classification number: G06F1/12

Abstract: A system and method for synchronizing multiple integrated circuit (IC) chips for an input device having a display device integrated with a capacitive sensing device. A first one of the IC chips is a master IC chip and a second one of the IC chips is a slave IC chip. The master IC chip is configured to transmit synchronization signals to and from the slave IC chip, such that capacitive frames are acquired by each of the IC chips at substantially the same time, the initiation of the sensing signals is synchronized for each of the IC chips and the clock signals of the slave IC chips are synchronized with the clock signal of the master IC chip.

公开(公告)号：US10228797B2

公开(公告)日：2019-03-12

申请号：US15265465

申请日：2016-09-14

Applicant: SYNAPTICS INCORPORATED

Inventor： Jeremy Roberson ,  David Sobel ,  Farzaneh Shahrokhi ,  Adam Schwartz ,  Eric Scott Bohannon

IPC: G06F3/041 ,  G06F3/044

Abstract: Embodiments described herein include an input device with a plurality of capacitive sensor electrodes configured to receive a signal. The input device also includes a processing system coupled to the plurality of capacitive sensor electrodes. The processing system includes an analog front end (AFE). The AFE includes an anti-aliasing filter comprising a continuous time analog infinite impulse response (IIR) filter configured to filter out interference from the received signal at frequencies higher than a signal frequency of the processing system to produce an anti-aliased signal. The AFE also includes a charge integrator configured to integrate the anti-aliased signal.

公开(公告)号：US09176633B2

公开(公告)日：2015-11-03

申请号：US14231314

申请日：2014-03-31

Applicant: SYNAPTICS INCORPORATED

Inventor： Jeremy Roberson ,  Adam Schwartz

IPC: G06F3/044 ,  H04J13/00 ,  G06F3/041

CPC classification number: G06F3/044 ,  G06F3/0418 ,  G06F2203/04111 ,  H04J13/004

Abstract: A processing system configured to sense an input object in a sensing region of a sensing device including a transmitter module coupled to a first transmitter electrode and a second transmitter electrode and configured to simultaneously apply a first transmitter signal to the first transmitter electrode and a second transmitter signal to the second transmitter electrode, wherein the first transmitter signal is based on a first one of a plurality of distinct codes and the second transmitter signal is based on a second one of the plurality of distinct codes. The processing system also includes a receiver module including receiver circuitry coupled to a first receiver electrode and configured to receive a first resulting signal with the first receiver electrode, the first resulting signal comprising effects corresponding to the first and second transmitter signals and a noise component. The processing system is configured to determine an estimate of the noise component using a third one of the plurality of distinct codes which is not associated with a transmitter signal.

Abstract translation: 一种处理系统，被配置为感测感测装置的感测区域中的输入物体，​​包括耦合到第一发射器电极和第二发射器电极的发射器模块，并且被配置为同时向第一发射器电极施加第一发射器信号，以及第二发射器 信号到第二发射机电极，其中第一发射机信号基于多个不同码中的第一发射机信号，并且第二发射机信号基于多个不同码中的第二发射机信号。 该处理系统还包括接收器模块，该接收器模块包括耦合到第一接收器电极的接收器电路，并且被配置为用第一接收器电极接收第一结果信号，第一结果信号包括对应于第一和第二发射器信号的效应和噪声分量。 处理系统被配置为使用与发射机信号不相关联的多个不同码中的第三个来确定噪声分量的估计。

公开(公告)号：US11159150B2

公开(公告)日：2021-10-26

申请号：US16869518

申请日：2020-05-07

Applicant: SYNAPTICS INCORPORATED

Inventor： Jeremy Roberson ,  David Sobel ,  Damien Berget

IPC: H03K4/94 ,  H03K5/003 ,  G06F3/041 ,  G06F3/044 ,  H03K5/04 ,  H03K3/01 ,  H03K5/00

Abstract: Embodiments disclosed herein generally relate to electronic devices, and more specifically, to a waveform generation circuit for input devices. One or more embodiments provide a new waveform generator for an integrated touch and display driver (TDDI) and methods for generating a waveform for capacitive sensing with a finely tunable sensing frequency. A waveform generator includes accumulator circuitry, truncation circuitry, and saturation circuitry. The accumulator circuitry is configured to accumulate the phase increment value based on a clock signal, and output the accumulated phase increment value. The truncation circuitry configured to drop one or more bits of the accumulated phase increment value to output a truncated value. The saturation circuitry is configured to compare the truncated value to a saturation limit and output a signal corresponding to accessed data samples.

公开(公告)号：US10686432B2

公开(公告)日：2020-06-16

申请号：US16201600

申请日：2018-11-27

Applicant: SYNAPTICS INCORPORATED

Inventor： Jeremy Roberson ,  David Sobel ,  Damien Berget

IPC: H03K4/94 ,  H03K3/01 ,  H03K5/04 ,  H03K5/003 ,  G06F3/044 ,  G06F3/041 ,  H03K5/00

Abstract: Embodiments disclosed herein generally relate to electronic devices, and more specifically, to a waveform generation circuit for input devices. One or more embodiments provide a new waveform generator for an integrated touch and display driver (TDDI) and methods for generating a waveform for capacitive sensing with a finely tunable sensing frequency. A waveform generator includes accumulator circuitry, truncation circuitry, and saturation circuitry. The accumulator circuitry is configured to accumulate the phase increment value based on a clock signal, and output the accumulated phase increment value. The truncation circuitry configured to drop one or more bits of the accumulated phase increment value to output a truncated value. The saturation circuitry is configured to compare the truncated value to a saturation limit and output a signal corresponding to accessed data samples.

公开(公告)号：US20150277621A1

公开(公告)日：2015-10-01

申请号：US14231314

申请日：2014-03-31

Applicant: SYNAPTICS INCORPORATED

Inventor： Jeremy Roberson ,  Adam Schwartz

IPC: G06F3/044 ,  G06F3/041 ,  H04J13/00

CPC classification number: G06F3/044 ,  G06F3/0418 ,  G06F2203/04111 ,  H04J13/004

Abstract: A processing system configured to sense an input object in a sensing region of a sensing device including a transmitter module coupled to a first transmitter electrode and a second transmitter electrode and configured to simultaneously apply a first transmitter signal to the first transmitter electrode and a second transmitter signal to the second transmitter electrode, wherein the first transmitter signal is based on a first one of a plurality of distinct codes and the second transmitter signal is based on a second one of the plurality of distinct codes. The processing system also includes a receiver module including receiver circuitry coupled to a first receiver electrode and configured to receive a first resulting signal with the first receiver electrode, the first resulting signal comprising effects corresponding to the first and second transmitter signals and a noise component. The processing system is configured to determine an estimate of the noise component using a third one of the plurality of distinct codes which is not associated with a transmitter signal.

Abstract translation: 一种处理系统，被配置为感测感测装置的感测区域中的输入物体，​​包括耦合到第一发射器电极和第二发射器电极的发射器模块，并且被配置为同时向第一发射器电极施加第一发射器信号，以及第二发射器 信号到第二发射机电极，其中第一发射机信号基于多个不同码中的第一发射机信号，并且第二发射机信号基于多个不同码中的第二发射机信号。 该处理系统还包括接收器模块，该接收器模块包括耦合到第一接收器电极的接收器电路，并且被配置为用第一接收器电极接收第一结果信号，第一结果信号包括对应于第一和第二发射器信号的效应和噪声分量。 处理系统被配置为使用与发射机信号不相关联的多个不同码中的第三个来确定噪声分量的估计。

公开(公告)号：US20210200259A1

公开(公告)日：2021-07-01

申请号：US17199786

申请日：2021-03-12

Applicant: Synaptics Incorporated

Inventor： Jeremy Roberson ,  David Sobel

IPC: G06F1/12

Abstract: A system and method for synchronizing multiple integrated circuit (IC) chips for an input device having a display device integrated with a capacitive sensing device. A first one of the IC chips is a master IC chip and a second one of the IC chips is a slave IC chip. The master IC chip is configured to transmit synchronization signals to and from the slave IC chip, such that capacitive frames are acquired by each of the IC chips at substantially the same time, the initiation of the sensing signals is synchronized for each of the IC chips and the clock signals of the slave IC chips are synchronized with the clock signal of the master IC chip.

公开(公告)号：US10983553B2

公开(公告)日：2021-04-20

申请号：US16178202

申请日：2018-11-01

Applicant: SYNAPTICS INCORPORATED

Inventor： Jeremy Roberson ,  David Sobel

IPC: G06F1/12

Abstract: A system and method for synchronizing multiple integrated circuit (IC) chips for an input device having a display device integrated with a capacitive sensing device. A first one of the IC chips is a master IC chip and a second one of the IC chips is a slave IC chip. The master IC chip is configured to transmit synchronization signals to and from the slave IC chip, such that capacitive frames are acquired by each of the IC chips at substantially the same time, the initiation of the sensing signals is synchronized for each of the IC chips and the clock signals of the slave IC chips are synchronized with the clock signal of the master IC chip.