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公开(公告)号:US20250126996A1
公开(公告)日:2025-04-17
申请号:US18807312
申请日:2024-08-16
Applicant: Samsung Display Co., LTD.
Inventor: Minwoo Byun , Hyunae Park , Jaewon Cho , Minjoo Kim , Donghwan Jeon , Seoni Jeong , Sungchan Hwang
IPC: H10K59/131 , G09G3/3233 , H10K59/126 , H10K59/35 , H10K59/80
Abstract: A display apparatus including pixels arranged in a display area includes a first conductive layer including a first voltage line, a second conductive layer disposed on the first conductive layer and including a first conductive pattern overlapping the first voltage line, a semiconductor layer disposed on the second conductive layer and including a first semiconductor pattern overlapping the first conductive pattern, a third conductive layer disposed on the semiconductor layer and including a second conductive pattern overlapping the first conductive pattern, and a fourth conductive layer disposed on the third conductive layer and including a data line and a third conductive pattern overlapping the second conductive pattern, wherein the first voltage line includes a body portion extending in a first direction and a shielding portion extending from the body portion in a second direction to overlap the data line, wherein the second direction crosses the first direction.
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公开(公告)号:US20250104596A1
公开(公告)日:2025-03-27
申请号:US18675139
申请日:2024-05-28
Applicant: Samsung Display Co., Ltd.
Inventor: MINJOO KIM , MINWOO BYUN , KYONGHWAN OH , YANG-HWA CHOI , Donghwan Jeon
Abstract: A gate driver includes a plurality of stages. At least one of the stages includes a control circuit configured to control a first control node in response to a first carry clock signal, a node separation transistor connected between the first control node and a second control node, a carry output circuit configured to output a carry signal in response to a voltage of the second control node, and a plurality of gate output circuits configured to output a plurality of gate signals having different timings in response to the voltage of the second control node.
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公开(公告)号:US20240324337A1
公开(公告)日:2024-09-26
申请号:US18405309
申请日:2024-01-05
Applicant: Samsung Display Co., Ltd.
Inventor: Jongsik Shim , Sujin Kim , Minwoo Byun , Donghwan Jeon , Minjoo Kim , Kyonghwan Oh , Seoni Jeong , Sungchan Hwang
IPC: H10K59/131 , H10K59/121 , H10K59/123
CPC classification number: H10K59/131 , H10K59/1216 , H10K59/123
Abstract: A display apparatus includes a first electrode and a second electrode that are spaced apart from each other, a third electrode disposed on the first electrode and overlapping the first electrode and the second electrode, a fourth electrode disposed on the third electrode and overlapping the third electrode, and a fifth electrode disposed on the fourth electrode, overlapping the fourth electrode, and electrically connected to the third electrode.
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公开(公告)号:US20240298466A1
公开(公告)日:2024-09-05
申请号:US18591929
申请日:2024-02-29
Applicant: Samsung Display Co., Ltd.
Inventor: Sujin Kim , Chulkyu Kang , Donghyun Kim , Seonkyoon Mok , Jongsik Shim , Donghwan Jeon
IPC: H10K59/12 , H10K59/125 , H10K59/80 , H10K59/82
CPC classification number: H10K59/1201 , H10K59/125 , H10K59/805 , H10K59/82
Abstract: A display apparatus includes a first transistor including a first gate electrode, and a first semiconductor layer, a second transistor including a second gate electrode, and a second semiconductor layer, a node electrode connecting the first transistor to the second transistor, a first conductive layer disposed above the node electrode and overlapping the node electrode in plan view, and a pixel electrode disposed above the first conductive layer and disposed around the node electrode.
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公开(公告)号:US20240265869A1
公开(公告)日:2024-08-08
申请号:US18475332
申请日:2023-09-27
Applicant: Samsung Display Co., Ltd.
Inventor: Minwoo Byun , Wonkyu Kwak , Jihyun Ka , Minjoo Kim , Donghwan Jeon , Seoni Jeong , Sungchan Hwang
IPC: G09G3/3233 , G09G3/3275
CPC classification number: G09G3/3233 , G09G3/3275 , G09G2310/0202 , G09G2320/0247
Abstract: A display apparatus including pixels, each including a driving transistor comprising a first terminal, a second terminal, a first gate, and a second gate electrically connected to the second terminal. Each pixel further includes a first transistor electrically connected to a driving voltage line and the first terminal of the driving transistor, a second transistor electrically connected to the second terminal of the driving transistor and a light-emitting diode, a first capacitor electrically connected to the first gate of the driving transistor and the second terminal of the driving transistor, and a second capacitor electrically connected to the driving voltage line and the second terminal of the driving transistor. A timing at which a first gate signal is applied to a gate of the first transistor and a timing at which a second gate signal is applied to a gate of the second transistor are different from each other.
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