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公开(公告)号:US20240292658A1
公开(公告)日:2024-08-29
申请号:US18383899
申请日:2023-10-26
Applicant: Samsung Display Co., Ltd.
Inventor: Jung Hoon LEE , Jong Beom KO , Yeon Hong KIM , Eun Hyun KIM , Sun Hee LEE , Hyun Mo LEE
IPC: H10K59/121 , H10K59/12
CPC classification number: H10K59/1213 , H10K59/1201
Abstract: The present disclosure relates to a display device, more particularly, to a display device in which the number of contact holes may be reduced to improve space utilization of pixels, and the method for fabricating the same. According to an embodiment of the disclosure, the display device includes a first active layer, a first transistor connected to the first active layer, a pixel electrode connected to the first transistor, a second active layer including a material different from a material of the first active layer, and a second transistor connected to the second active layer. At least a portion of the second active layer is directly connected to at least a portion of the first active layer.
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公开(公告)号:US20250089454A1
公开(公告)日:2025-03-13
申请号:US18629271
申请日:2024-04-08
Applicant: Samsung Display Co., LTD.
Inventor: Hyun Jun JEONG , Kwang Soo KO , Myeong Ho KIM , Yeon Keon MOON , Hyun Mo LEE , Kun Hee JO
IPC: H10K59/121 , H10K59/12
Abstract: A display device includes a substrate including a display area and a driving circuit area, a first transistor in the display area, and including a first active layer on the substrate and a first gate electrode on the first active layer, a first gate insulating layer between the first active layer and the first gate electrode, and entirely covering the first active layer, a second transistor in the driving circuit area, and including a second active layer on the substrate and a second gate electrode on the second active layer, a second gate insulating layer between the second active layer and the second gate electrode, covering a part of the second active layer overlapping the second gate electrode, and exposing another part of the second active layer, and a first oxide semiconductor layer between the first gate insulating layer and the first gate electrode.
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公开(公告)号:US20240121998A1
公开(公告)日:2024-04-11
申请号:US18446234
申请日:2023-08-08
Applicant: Samsung Display Co., LTD.
Inventor: Sun Hee LEE , Eun Hye KO , Sang Woo SOHN , Jung Hoon LEE , Hyun Mo LEE , Hyun Jun JEONG
IPC: H10K59/124 , H10K59/12 , H10K59/131
CPC classification number: H10K59/124 , H10K59/1201 , H10K59/131
Abstract: A thin-film transistor including an active layer disposed on a substrate and including a channel region, a source region connected to a side of the channel region, and a drain region connected to the other side of the channel region; a gate insulating layer on the channel region of the active layer; and a gate electrode on the gate insulating layer. A slope of each side surface of the gate electrode with respect to a boundary surface between the gate insulating layer and the gate electrode is an obtuse angle (a substantially obtuse angel). A slope of each side surface of the gate insulating layer with respect to the boundary surface between the gate insulating layer and the gate electrode is an obtuse angle (a substantially obtuse angel).
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