公开(公告)号：US09355741B2

公开(公告)日：2016-05-31

申请号：US14276801

申请日：2014-05-13

Applicant: Samsung Display Co., LTD.

Inventor： Sang-Jin Jeon ,  Jun-Ki Jeong ,  Se-Hyoung Cho

IPC: G09G3/36 ,  G11C19/28

CPC classification number: G11C19/28 ,  G09G3/3677 ,  G09G2310/0286

Abstract: A gate drive circuit includes a shift register having a plurality of stages, in which an n-th stage (‘n’ is a natural number) of the plurality of stages is connected to at least one subsequent stage. The n-th stage includes a pull-up part configured to output a high voltage of an n-th gate signal using a high voltage of a clock signal as in response to a high voltage of a control node, a control pull-down part configured to pull-down a voltage of the control node into a low voltage in response to a carry signal outputted from at least one of next stages of the n-th stage and receiving a back-bias voltage corresponding to the low voltage, and a carry part configured to output the high voltage of the clock signal as an n-th carry signal in response to a high voltage of the control node.

Abstract translation: 栅极驱动电路包括具有多个级的移位寄存器，其中多级的第n级（'n'是自然数）连接到至少一个后级。 第n级包括上拉部分，其配置为响应于控制节点的高电压，使用时钟信号的高电压输出第n门信号的高电压;控制下拉部分 被配置为响应于从第n级的下一级中的至少一级输出的进位信号将控制节点的电压下拉到低电压并且接收与低电压相对应的反偏压，以及 携带部件被配置成响应于控制节点的高电压而输出时钟信号的高电压作为第n进位信号。

公开(公告)号：US09898980B2

公开(公告)日：2018-02-20

申请号：US14702611

申请日：2015-05-01

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ho-Kyoon Kwon ,  Myoung-Soo Kim ,  Sang-Ik Lee ,  Kyoung-Ho Lim ,  Kwang-Chul Jung ,  Jun-Ki Jeong ,  Ki-Seok Cha ,  Joon-Chul Goh ,  Bong-Hyun You

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3614 ,  G09G2300/0426 ,  G09G2310/0281

Abstract: A display apparatus includes a plurality of pixels arranged in columns and rows in a display area, a data line extending in a first direction and connected with pixels of a k-th column (‘k’ is a natural number) and a (k+1)-th column, a gate line extending in a second direction crossing the first direction and connected with ones of the pixels, a gate signal line extending in the first direction and connected with the gate line, and a gate driver in a first peripheral area adjacent to a first longer side of the display area and having a first width, and configured to apply a gate signal to the gate line.

公开(公告)号：US20160133214A1

公开(公告)日：2016-05-12

申请号：US14702611

申请日：2015-05-01

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ho-Kyoon Kwon ,  Myoung-Soo Kim ,  Sang-Ik Lee ,  Kyoung-Ho Lim ,  Kwang-Chul Jung ,  Jun-Ki Jeong ,  Ki-Seok Cha ,  Joon-Chul Goh ,  Bong-Hyun You

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3614 ,  G09G2300/0426 ,  G09G2310/0281

Abstract: A display apparatus includes a plurality of pixels arranged in columns and rows in a display area, a data line extending in a first direction and connected with pixels of a k-th column (‘k’ is a natural number) and a (k+1)-th column, a gate line extending in a second direction crossing the first direction and connected with ones of the pixels, a gate signal line extending in the first direction and connected with the gate line, and a gate driver in a first peripheral area adjacent to a first longer side of the display area and having a first width, and configured to apply a gate signal to the gate line.

Abstract translation: 显示装置包括在显示区域中以行和列排列的多个像素，沿第一方向延伸并与第k列（'k'为自然数）的像素连接的数据线，（k + 第一列，沿与第一方向交叉的第二方向延伸并与像素中的一个相连的栅极线，沿着第一方向延伸并与栅极线连接的栅极信号线，以及第一周边的栅极驱动器 区域，与显示区域的第一长边相邻并且具有第一宽度，并且被配置为向栅极线施加栅极信号。