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公开(公告)号:US20210050391A1
公开(公告)日:2021-02-18
申请号:US16991486
申请日:2020-08-12
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Sewan SON , Jinsung AN , Minwoo WOO , Wangwoo LEE , Jiseon LEE , Haejin KIM , Seongjun LEE
Abstract: A display apparatus includes: a base substrate including a display area, an opening area, and an opening peripheral area between the opening area and the display area, wherein the display area surrounds the opening area, and the opening peripheral area has an annular shape; a conductive pattern disposed on the base substrate in the opening peripheral area and having an annular shape; and a light emitting layer disposed on the base substrate and in a portion of the opening peripheral area, and including an organic material, and wherein the light emitting layer is not formed at a portion of opening peripheral area that is adjacent to the opening area.
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公开(公告)号:US20200266216A1
公开(公告)日:2020-08-20
申请号:US16787985
申请日:2020-02-11
Applicant: Samsung Display Co., Ltd.
Inventor: Wangwoo LEE , Moosoon KO , Minwoo WOO
IPC: H01L27/12
Abstract: A display apparatus includes a base substrate, an active layer on the base substrate and including a first active pattern, a first insulating layer on the active layer, a first gate conductive layer on the first insulating layer, a second insulating layer on the first gate conductive layer, and a third gate conductive layer on the second insulating layer, and including a third-a gate pattern. The third gate conductive layer is not directly connected to the first gate conductive layer.
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公开(公告)号:US20240196659A1
公开(公告)日:2024-06-13
申请号:US18387136
申请日:2023-11-06
Applicant: Samsung Display Co., LTD.
Inventor: Sewan SON , Sungho KIM , Minwoo WOO , Seunghyun LEE , Wangwoo LEE , Jiseon LEE , Kyeongwoo JANG , Sugwoo JUNG , Hyeri CHO , Seunggyu TAE
IPC: H10K59/122 , H10K59/12
CPC classification number: H10K59/122 , H10K59/1201
Abstract: A display apparatus includes a first sub-pixel electrode, a conductive bank layer which is disposed on the first sub-pixel electrode and in which a first opening overlapping the first sub-pixel electrode is defined. The conductive bank layer includes first and second conductive layers having different etch selectivities from each other, an insulating layer which is disposed between a peripheral portion of the first sub-pixel electrode and the conductive bank layer and in which an opening overlapping the first opening is defined, an insulating protective layer which is disposed between the insulating layer and the conductive bank layer and in which an opening overlapping the first opening is defined. The insulating protective layer includes an insulating material having an etch selectivity different from an etch selectivity of the insulating layer, a first intermediate layer overlapping the first sub-pixel electrode through the first opening of the conductive bank layer.
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公开(公告)号:US20200295112A1
公开(公告)日:2020-09-17
申请号:US16737694
申请日:2020-01-08
Applicant: Samsung Display Co., Ltd.
Inventor: Junghwa KIM , Sewan SON , Minwoo WOO , Wangwoo LEE , Jihoon KIM , Byungseon AN , Yonghui LEE , Kihyun CHO
Abstract: A display panel includes: a substrate including an opening area, a display area surrounding the opening area, and an intermediate area between the opening area and the display area; a plurality of display elements in the display area and electrically connected to a thin film transistor; a plurality of wirings arranged along an edge of the opening area in the intermediate area; and at least one metal pattern spaced apart from the plurality of wirings in the intermediate area, the at least one metal pattern surrounding the opening area and having a ring shape opened at one side.
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公开(公告)号:US20200006451A1
公开(公告)日:2020-01-02
申请号:US16358020
申请日:2019-03-19
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Sewan SON , Moosoon KO , Youngwoo PARK , Jinsung AN , Minwoo WOO , Juwon YOON , Seongjun LEE , Wangwoo LEE , Jeongsoo LEE , Jiseon LEE , Deukmyung JI
Abstract: A display apparatus includes a substrate, a first thin-film transistor including a first semiconductor layer on the substrate, and a first gate electrode on the first semiconductor layer, the first gate electrode being insulated from the first semiconductor layer by a first gate insulating layer, an organic interlayer insulating layer covering the first gate electrode, a first conductive layer on the organic interlayer insulating layer, a first contact hole exposing a top portion of the first semiconductor layer by penetrating through the organic interlayer insulating layer and the first gate insulating layer, and a first protruding portion protruding from a top surface of the substrate between the substrate and the first semiconductor layer, the first protruding portion corresponding to the first contact hole, wherein the first conductive layer contacts the first semiconductor layer through the first contact hole.
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