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公开(公告)号:US20250133926A1
公开(公告)日:2025-04-24
申请号:US18918434
申请日:2024-10-17
Applicant: Samsung Display Co., LTD.
Inventor: YANG-HWA CHOI , DOO-YOUNG LEE , DONGHYEON KI , HYUK KIM , SANG-UK LIM
IPC: H10K59/131 , H10K59/80
Abstract: A display device includes a first active pattern disposed on a substrate, a first data line disposed on the first active pattern and electrically connected to the first active pattern, a first pixel electrode disposed on the first data line, electrically connected to the first active pattern, at least partially overlapping the first data line in a plan view, and shielding the first data line, and a common electrode disposed on the first pixel electrode.
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公开(公告)号:US20220351674A1
公开(公告)日:2022-11-03
申请号:US17683763
申请日:2022-03-01
Applicant: Samsung Display Co., Ltd.
Inventor: YANG-HWA CHOI , JUNGHWAN HWANG
IPC: G09G3/32
Abstract: A display device includes a display panel including a pixel and a panel driver which drives the display panel at a first panel frequency in a first driving mode and drives the display panel at a second panel frequency in a second driving mode. The pixel includes a light emitting element and first, second, third, and fourth transistors. The first transistor is connected between a power line and the light emitting element. The second transistor is connected between a data line and the first transistor and receives a first scan signal. The third transistor is connected between the first transistor and an initialization voltage line and receives a second scan signal. The fourth transistor is connected between the first transistor and a reset voltage line and receives a third scan signal. The third scan signal is inactivated in the first driving mode and is activated in the second driving mode.
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公开(公告)号:US20220115494A1
公开(公告)日:2022-04-14
申请号:US17361712
申请日:2021-06-29
Applicant: Samsung Display Co., LTD.
Inventor: HYUK KIM , YANG-HWA CHOI , JUNGHWAN HWANG
IPC: H01L27/32
Abstract: A display device includes: a plurality of pixels disposed in a display area; a plurality of first voltage lines electrically connected to the plurality of pixels, the plurality of first voltage lines including a plurality of first common voltage lines extending in a first direction and a plurality of second common voltage lines extending in a second direction intersecting the first direction; and a plurality of second voltage lines electrically connected to the pixels, the plurality of second voltage lines including a plurality of first driving voltage lines extending in the first direction and a plurality of second driving voltage lines extending in the second direction. The number of the first common voltage lines are greater than the number of the first driving voltage lines.
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公开(公告)号:US20250104596A1
公开(公告)日:2025-03-27
申请号:US18675139
申请日:2024-05-28
Applicant: Samsung Display Co., Ltd.
Inventor: MINJOO KIM , MINWOO BYUN , KYONGHWAN OH , YANG-HWA CHOI , Donghwan Jeon
Abstract: A gate driver includes a plurality of stages. At least one of the stages includes a control circuit configured to control a first control node in response to a first carry clock signal, a node separation transistor connected between the first control node and a second control node, a carry output circuit configured to output a carry signal in response to a voltage of the second control node, and a plurality of gate output circuits configured to output a plurality of gate signals having different timings in response to the voltage of the second control node.
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公开(公告)号:US20230247878A1
公开(公告)日:2023-08-03
申请号:US18100788
申请日:2023-01-24
Applicant: Samsung Display Co., Ltd.
Inventor: KANGMOON JO , TAK-YOUNG LEE , BOGYEONG KIM , YANG-HWA CHOI
IPC: H10K59/131 , H10K59/121 , H10K59/80
CPC classification number: H10K59/1315 , H10K59/1213 , H10K59/8792
Abstract: A display panel includes a base layer, first to third pixels, data lines, a first voltage line that is connected to the first to third pixels and that extends in a second direction, and an initialization voltage line that is connected to the first to third pixels and that extends in the second direction. Each of the first to third pixels includes a light-emitting element including an anode, a first transistor that is connected between the first voltage line and the anode and that includes a gate electrode, a second transistor connected with a data line of the data lines, a third transistor that is connected between the initialization voltage line and a node and that includes a gate electrode, and a fourth transistor that is connected between the node and the anode and that includes a gate electrode connected with the first voltage line.
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公开(公告)号:US20220343857A1
公开(公告)日:2022-10-27
申请号:US17720907
申请日:2022-04-14
Applicant: Samsung Display Co., Ltd.
Inventor: YANG-HWA CHOI , HYUK KIM , JUNGHWAN HWANG
IPC: G09G3/3266
Abstract: A display device includes a plurality of pixels connected to a plurality of first scan lines, a plurality of second scan lines, and a plurality of data lines, where the pixels are arranged in a plurality of rows, a plurality of first stages connected to the first scan lines, a plurality of second stages connected to the second scan lines, and a data driver connected to the data lines. Each of the first scan lines is connected to pixels arranged in a corresponding row among the rows. Each of the second scan lines is commonly connected to pixels arranged in corresponding 8h rows among the plurality of rows, where h is a natural number.
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公开(公告)号:US20220335898A1
公开(公告)日:2022-10-20
申请号:US17572938
申请日:2022-01-11
Applicant: Samsung Display Co., Ltd.
Inventor: JUNGHWAN HWANG , YANG-HWA CHOI
IPC: G09G3/3266 , G09G3/3291
Abstract: A pixel includes a first transistor, a second transistor, a third transistor, a capacitor, and a light emitting diode. During a non-emission period of a low frequency mode, the third transistor electrically connects a first terminal of the light emitting diode to an initialization voltage line in response to a second scan signal. An initialization voltage transferred from the initialization voltage line has a first voltage level during a normal mode different from the low frequency mode, and has a second voltage level different from the first voltage level during the non-emission period of the low frequency mode.
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