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公开(公告)号:US11183107B2
公开(公告)日:2021-11-23
申请号:US16918454
申请日:2020-07-01
Applicant: Samsung Display Co., Ltd.
Inventor: Byung Ki Chun , Seung Jae Lee , Hae Kwan Seo , Chang Noh Yoon , Soon Dong Kim , Ji Hye Kim , Jun Gyu Lee , Jun Heyung Jung , Young Wook Yoo , Kuk Hwan Ahn , Hyun Jun Lim
Abstract: A display device including: a first pixel region including first pixels connected to a data line and first scan lines; a second pixel region in contact with the first pixel region at a first boundary and including second pixels connected to the data line and second scan lines; and a third pixel region in contact with the second pixel region at a second boundary and including third pixels connected to the data line and third scan lines, wherein the display device is configured to scale an image displayed in the second pixel region one or more times based on the second pixel region maintaining a folded state.
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公开(公告)号:US11227537B2
公开(公告)日:2022-01-18
申请号:US16829954
申请日:2020-03-25
Applicant: Samsung Display Co., Ltd.
Inventor: Chang Noh Yoon , Hae Kwan Seo , Won Tae Kim
IPC: G09G3/32
Abstract: A display device includes a timing controller configured to generate clock signals, a start signal, and image data. A scan driver includes a plurality of stages configured to sequentially output the clock signals as scan signals in response to the start signal. A data driver is configured to generate a data signal based on the image data. A display unit includes pixels configured to emit light with luminance corresponding to the data signal in response to the scan signal. The timing controller is to mask at least one of the clock signals in a first section, a second section, and a third section included in one frame section and spaced from each other.
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公开(公告)号:US11783758B2
公开(公告)日:2023-10-10
申请号:US17576768
申请日:2022-01-14
Applicant: Samsung Display Co., Ltd.
Inventor: Chang Noh Yoon , Hae Kwan Seo , Won Tae Kim
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2330/021
Abstract: A display device includes a timing controller configured to generate clock signals, a start signal, and image data. A scan driver includes a plurality of stages configured to sequentially output the clock signals as scan signals in response to the start signal. A data driver configured to generate a data signal based on the image data. A display unit includes pixels configured to emit light with luminance corresponding to the data signal in response to the scan signal. The timing controller is to mask at least one of the clock signals in a first section, a second section, and a third section included in one frame section and spaced from each other.
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公开(公告)号:US11574584B2
公开(公告)日:2023-02-07
申请号:US17657807
申请日:2022-04-04
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Soon Dong Kim , Sang An Kwon , Jin Wook Yang , Chang Noh Yoon
IPC: G09G3/32
Abstract: A display device includes a display panel having first and second display areas. A data driver provides data and bias voltages to data lines. A timing controller controls the data driver and a scan driver based on at least two operation modes. The first mode drives the first and second display areas at a normal frequency, and the second mode drives the first display area at a first frequency substantially equal to or lower than the normal frequency and the second display area at a second frequency lower than the first frequency. The second mode includes an active frame to write a reference voltage to display a black image in the second display area, and blank frames to maintain the reference voltage and apply the bias voltage to the pixels in the second display area. The data driver varies the bias voltage in the blank frames.
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公开(公告)号:US11183122B2
公开(公告)日:2021-11-23
申请号:US16539044
申请日:2019-08-13
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Jin Wook Yang , Soon Dong Kim , Chang Noh Yoon , Eun Gyeong Choe
IPC: G09G3/3266 , G09G3/3258 , G09G3/3233 , G09G3/3275
Abstract: A display device includes pixels sequentially arranged along a first direction, a data driver having output lines and generating data signals, data lines each including sub-data lines extended along the first direction, demultiplexers each connecting a corresponding output line of the output lines to a corresponding data line of the data lines and switching the corresponding output line to one of the sub-data lines one at a time so that each of the data signals is supplied to a corresponding pixel of the pixels.
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