公开(公告)号：US20220383788A1

公开(公告)日：2022-12-01

申请号：US17723820

申请日：2022-04-19

Applicant: Samsung Display Co., Ltd.

Inventor： JIWOONG KIM ,  OHJO KWON ,  IKHYUN KIM ,  HYUNGGUN MA ,  KYUNGTEA PARK ,  SEONGJOO LEE ,  KEUMDONG JUNG ,  SANGHYUN HEO ,  DONGHYUN HWANG

IPC: G09G3/20

Abstract: A driving chip includes a data channel block including a plurality of data channels, a scan channel block disposed in a first direction from the data channel block and including a plurality of scan channels, a data pad block disposed outside the data channel block and the scan channel block in the first direction and including a plurality of data pads which respectively receive a data signal from the plurality of data channels, and a scan pad block disposed outside the data channel block and the scan channel block in the first direction, disposed outside the data pad block in a second direction crossing the first direction and including a plurality of scan pads which respectively receive a scan signal from the scan channels.

公开(公告)号：US20230078957A1

公开(公告)日：2023-03-16

申请号：US17891882

申请日：2022-08-19

Applicant: Samsung Display Co., Ltd.

Inventor： KYUNGEUN PARK ,  DONGHYUN HWANG ,  Dongkyu Lee

IPC: G09G3/20

Abstract: A data driver is disclosed that includes a first digital-to-analog converter, a second digital-to-analog converter, a third digital-to-analog converter, a first pseudo amplifier, a second pseudo amplifier, and a main amplifier. The first digital-to-analog converter includes a first resistor string including first resistors and a first decoder. The second digital-to-analog converter includes a second resistor string including second resistors and a second decoder, and is connected to the first digital-to-analog converter. The third digital-to-analog converter is connected to the second digital-to-analog converter. The first pseudo amplifier includes first and second driving transistors. The second pseudo amplifier includes third and fourth driving transistors. The main amplifier is connected to the first and second pseudo amplifiers, and is configured to generate a reference current. The second resistor string is connected between first and second nodes, and a first output node disposed between the first and second driving transistors is connected to the first node. A second output node disposed between the third and fourth driving transistors is connected to the second node.