公开(公告)号：US20160247479A1

公开(公告)日：2016-08-25

申请号：US15019741

申请日：2016-02-09

申请人： Samsung Display Co., Ltd.

发明人： Sehyoung CHO ,  Kyunghoon KIM ,  Dongwoo KIM ,  Ilgon KIM ,  Kangmoon JO ,  Hyunjoon KIM

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G2310/0286

摘要： There is provided a scan driver. The scan driver includes stages. An ith (i is a natural number) stage circuit includes an output unit, a controller configured to control the voltage of the second node in response to a kth (k is a natural number) clock signal supplied to a second input terminal, and an input unit configured to control the voltages of the first node and the second node in response to a carry signal of a previous stage that is supplied to a third input terminal and a carry signal of at least one next stage. The kth clock signal maintains a gate on voltage at a point of time at which a voltage of the jth clock signal is changed to a gate on voltage.

摘要翻译： 提供了扫描驱动程序。 扫描驱动程序包括阶段。 第i（i是自然数）级电路包括输出单元，被配置为响应于提供给第二输入端的第k（k是自然数）时钟信号来控制第二节点的电压的控制器，以及 输入单元，被配置为响应于提供给第三输入端的先前级的进位信号和至少一个下一级的进位信号来控制第一节点和第二节点的电压。 第k个时钟信号在第j个时钟信号的电压变为栅极导通电压的时间点处保持栅极导通电压。