公开(公告)号：US20170047356A1

公开(公告)日：2017-02-16

申请号：US15075345

申请日：2016-03-21

Applicant: Samsung Display Co., Ltd.

Inventor： Sohyun LEE ,  Sowoon KIM ,  Haeryeong PARK ,  Suah OH ,  Wando LEE

IPC: H01L27/12

CPC classification number: H01L27/1244 ,  G02F1/13452 ,  G02F1/136259 ,  H01L27/124

Abstract: An array substrate includes a plurality of signal lines disposed in a display area; a plurality of signal pads disposed in a non-display area; and a fan-out portion disposed in the non-display. The fan-out portion includes a plurality of fan-out lines connecting the plurality of signal lines to the plurality of signal pads. Each of the plurality of fan-out lines includes a pattern electrically connected to a corresponding signal pad of the plurality of signal pads, and a straight portion electrically connected to a corresponding signal line of the plurality of signal lines. The pattern includes a first conductive layer. The straight portion includes the first conductive layer and a second conductive layer disposed on the first conductive layer.

Abstract translation: 阵列基板包括布置在显示区域中的多条信号线; 设置在非显示区域中的多个信号焊盘; 以及设置在非显示器中的扇出部分。 扇出部分包括将多个信号线连接到多个信号焊盘的多个扇出线。 多个扇出线中的每一个包括电连接到多个信号焊盘的相应信号焊盘的图案，以及电连接到多条信号线的相应信号线的直线部分。 该图案包括第一导电层。 直的部分包括第一导电层和设置在第一导电层上的第二导电层。