公开(公告)号：US20220415778A1

公开(公告)日：2022-12-29

申请号：US17655573

申请日：2022-03-21

Applicant: Samsung Electronics Co., LTD.

Inventor： JUNWOO PARK ,  SEUNGHWAN KIM ,  JUNGJOO KIM ,  YONGKWAN LEE ,  DONGJU JANG

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00

Abstract: A semiconductor package includes a lower substrate that includes a lower wiring layer; a semiconductor chip disposed on the lower substrate, and an upper substrate disposed on the semiconductor chip. The upper substrate includes a lower surface that faces the semiconductor chip, an upper wiring layer, and a plurality of protruding structures disposed below the lower surface. The lower surface of the upper substrate includes a cavity region that overlaps the semiconductor chip in a first direction, and a plurality of channel regions that extend from the cavity region to an edge of the upper substrate. The cavity region and the plurality of channel regions are defined by the plurality of protruding structures.