公开(公告)号：US10090266B2

公开(公告)日：2018-10-02

申请号：US15205414

申请日：2016-07-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ae-Hee Choi ,  Sang-ki Kim ,  Ahyun Jo ,  Kyo-Seon Choi

IPC: H01L23/00 ,  H01L21/00 ,  H01L23/58 ,  H01L29/10 ,  H01L21/66 ,  H01L23/31 ,  H01L25/065 ,  H01L23/498 ,  H01L23/544 ,  H01L23/50 ,  H01L25/00

Abstract: A semiconductor device includes a semiconductor chip having a semiconductor substrate with chip and boundary regions, and an integrated circuit on the chip region. A center pad is provided on the chip region and on the integrated circuit, and a boundary pad is provided on the boundary region. The semiconductor device further includes a first lower insulating structure having a contact hole exposing the center pad, a second lower insulating structure, at the same vertical level as the first lower insulating structure, and having a first opening exposing the boundary pad to an outside of the first lower insulating structure, a conductive pattern including a contact portion, a conductive line portion, and a bonding pad portion, and an upper insulating structure formed on the first lower insulating structure and the conductive pattern and having a second opening exposing the bonding pad portion to the outside of the semiconductor chip. The first lower insulating structure has a top surface positioned at a higher vertical level than that of the second lower insulating structure.