Display panel driver, source driver, and display device including the source driver

    公开(公告)号:US11532262B2

    公开(公告)日:2022-12-20

    申请号:US17030912

    申请日:2020-09-24

    Abstract: A display driver includes first and second level shifters, respectively receiving a digital signal's most significant bit (MSB) and the digital signal's non-MSB. The first level shifter includes a first input terminal, a first output terminal via which a signal input to the first input terminal is output, a second input terminal, and a second output terminal via which a signal input to the second input terminal is output. The second level shifter includes a third input terminal, a third output terminal via which a signal input to the third input terminal is output, a fourth input terminal, and a fourth output terminal via which a signal input to the fourth input terminal is output. The first input terminal receives an inverted MSB, the second input terminal receives the MSB, the third input terminal receives the non-MSB, and the fourth input terminal receives the inverted non-MSB.

    Gamma adjustment circuit and display driver circuit using the same

    公开(公告)号:US11107434B2

    公开(公告)日:2021-08-31

    申请号:US17036627

    申请日:2020-09-29

    Abstract: A gamma adjustment circuit includes: a first node; a second node; a first decoder to which a first voltage signal and a second voltage signal are provided and which outputs either one of the first voltage signal and the second voltage signal as a third voltage signal; an amplifier receiving the third voltage signal as a positive input and outputting a fourth voltage signal; a second decoder receiving the fourth voltage signal and outputting the provided fourth voltage signal as a fifth voltage signal to one of the first and second nodes; a third decoder connected to the first and second nodes, receives the fifth voltage signal from one of the first and second nodes, and outputs the fifth voltage signal to a negative input terminal of the amplifier as a sixth voltage signal; and a first resistor connected between the first node and the second node.

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