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公开(公告)号:US11531588B2
公开(公告)日:2022-12-20
申请号:US17480560
申请日:2021-09-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kangseok Lee , Dong-min Shin , Geunyeong Yu , Bohwan Jun , Hee Youl Kwak , Hong Rak Son
Abstract: An error correction circuit includes a memory that stores at least one decoding parameter, a low density parity check (LDPC) decoder that includes a first variable node storing one bit of the data, receives the at least one decoding parameter from the memory, decides a degree of the first variable node based on the at least one decoding parameter, and decides a decoding rule necessary for decoding of the one bit based on the degree of the first variable node, and an adaptive decoding controller that outputs corrected data based on a decoding result of the LDPC decoder.
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公开(公告)号:US11175985B2
公开(公告)日:2021-11-16
申请号:US16914890
申请日:2020-06-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kangseok Lee , Dong-min Shin , Geunyeong Yu , Bohwan Jun , Hee Youl Kwak , Hong Rak Son
Abstract: An error correction circuit includes a memory that stores at least one decoding parameter, a low density parity check (LDPC) decoder that includes a first variable node storing one bit of the data, receives the at least one decoding parameter from the memory, decides a degree of the first variable node based on the at least one decoding parameter, and decides a decoding rule necessary for decoding of the one bit based on the degree of the first variable node, and an adaptive decoding controller that outputs corrected data based on a decoding result of the LDPC decoder.
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