公开(公告)号：US09436213B2

公开(公告)日：2016-09-06

申请号：US14219488

申请日：2014-03-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Du-Ho Kim ,  Jong-Shin Shin

IPC: G06F1/12

CPC classification number: G06F1/12

Abstract: Provided is a clock data recovery circuit including a phase-frequency detector configured to detect a frequency and phase of a reference clock signal and control a frequency and phase of an internal clock signal based on the detected frequency, a frequency detector configured to detect a frequency of a data signal and, based on the detected frequency of the data signal, adjust the frequency of the internal clock signal; and a phase detector configured to detect a phase of the data signal based on the detected frequency of the data signal and adjust the phase of the internal clock signal. Accordingly, a timing controller that includes the clock data recovery circuit is capable of establishing data communication at high speeds when the system is powered on/off to reduce power consumption. Also, the timing controller does not need to include an additional external clock generation device, and is capable of achieving frequency synchronization using a non-precision clock signal generated in the timing controller.

Abstract translation: 提供了一种时钟数据恢复电路，其包括：相位频率检测器，被配置为检测参考时钟信号的频率和相位，并且基于检测到的频率来控制内部时钟信号的频率和相位;频率检测器，被配置为检测频率 并且基于检测到的数据信号的频率来调整内部时钟信号的频率; 以及相位检测器，被配置为基于检测到的数据信号的频率来检测数据信号的相位，并调整内部时钟信号的相位。 因此，包括时钟数据恢复电路的定时控制器能够在系统通电/断开时以高速建立数据通信以降低功耗。 此外，定时控制器不需要包括附加的外部时钟生成装置，并且能够使用在定时控制器中生成的非精度时钟信号来实现频率同步。