公开(公告)号：US20240256755A1

公开(公告)日：2024-08-01

申请号：US18419016

申请日：2024-01-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunsun JUNG ,  Jeongmin KIM ,  Hoyoung LEE

IPC: G06F30/398

CPC classification number: G06F30/398

Abstract: A method of verifying an integrated circuit includes obtaining first data defining elements in the integrated circuit and second data defining positions and connection relationships of the elements, generating chip data by merging the first data and the second data in the background, performing a plurality of physical verifications in parallel, and generating output data, based on results of at least one of physical verifications. The performing of the plurality of physical verifications in parallel includes extracting verification input data used for physical verification, based on the chip data.