公开(公告)号：US20210183821A1

公开(公告)日：2021-06-17

申请号：US17183786

申请日：2021-02-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taehyeong KIM ,  Young Lyong KIM ,  Geol NAM

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

Abstract: Disclosed are semiconductor packages and methods of manufacturing the same. The method of manufacturing a semiconductor package may include providing a carrier substrate having a trench formed on a first top surface of the carrier substrate, providing a first semiconductor chip on the carrier substrate, mounting at least one second semiconductor chip on a second top surface of the first semiconductor chip, coating a mold member to surround a first lateral surface of the first semiconductor chip and a second lateral surface of the at least one second semiconductor chip, and curing the mold member to form a mold layer. The trench may be provided along a first edge of the first semiconductor chip. The mold member may cover a second edge of a bottom surface the first semiconductor chip.

公开(公告)号：US20210159178A1

公开(公告)日：2021-05-27

申请号：US16994139

申请日：2020-08-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Geol NAM ,  Gunho CHANG

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/373 ,  H01L23/00

Abstract: A semiconductor package includes: a base chip; a first semiconductor chip disposed on the base chip; a second semiconductor chip disposed on the first semiconductor chip; a first insulating layer disposed between the base chip and the first semiconductor chip; a second insulating layer disposed between the first semiconductor chip and the second semiconductor chip; a first connection bump penetrating through the first insulating layer and connecting the base chip and the first semiconductor chip to each other; and a second connection bump penetrating through the second insulating layer and connecting the first semiconductor chip and the second semiconductor chip to each other. The base chip has a width greater than a width of each of the first and second semiconductor chips. The first insulating layer and the second insulating layer include different materials from each other.

公开(公告)号：US20190013272A1

公开(公告)日：2019-01-10

申请号：US15870910

申请日：2018-01-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Geol NAM ,  Young Lyong KIM

IPC: H01L23/538 ,  H01L25/065

CPC classification number: H01L23/5385 ,  H01L23/5384 ,  H01L23/5386 ,  H01L25/0657 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544

Abstract: A semiconductor package is provided including a package substrate, a first semiconductor chip on the substrate, with a first surface and a second surface opposite to each other; a plurality of first connection terminals disposed on the first surface contacting an upper surface of the substrate; a second semiconductor chip disposed on the second surface, with a third surface and a fourth surface opposite to each other; a plurality of second connection terminals disposed on the third surface contacting the second surface, wherein an absolute value between a first area, the sum of areas in which the plurality of first connection terminals contact the upper surface of the package substrate, and a second area, the sum of areas in which the plurality of second connection terminals contact the second surface of the first semiconductor chip, is equal to or less than about 0.3 of the first area.