公开(公告)号：US20230083289A1

公开(公告)日：2023-03-16

申请号：US17941505

申请日：2022-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyuchan LEE ,  Pureum RYOO ,  Hyoungpyo LEE ,  Junghyun LIM

IPC: G09G5/393

Abstract: A display driving circuit includes a frame rate extractor configured to receive a vertical synchronization signal indicating a start of a k-th frame, k-th frame data including information about the k-th frame, and a data enable signal indicating an active period of the k-th frame and a variable blank period that occurs after the active period, and extract a frame rate of the k-th frame, based on the vertical synchronization signal; and an image corrector configured to correct frame data received after reception of the k-th frame data, based on the frame rate of the k-th frame, and output the corrected frame data as output image data, wherein the vertical synchronization signal is received before a start time point of the active period