SEMICONDUCTOR DEVICE INCLUDING A GATE INSULATION PATTERN AND A GATE ELECTRODE PATTERN

    公开(公告)号:US20190067278A1

    公开(公告)日:2019-02-28

    申请号:US15952798

    申请日:2018-04-13

    Abstract: A semiconductor device includes a substrate including an active region defined by a device isolation layer. A word line structure is in a trench formed in an upper portion of the substrate. The word line structure includes a gate insulation pattern covering an inner surface of the trench. A gate electrode pattern is on the gate insulation pattern. A first work function pattern is between the gate insulation pattern and the gate electrode pattern. A second work function pattern is on the first work function pattern and extends along a side surface of the gate electrode pattern. The first work function pattern has a top surface at a level below that of a bottom surface of the gate electrode pattern. The first work function pattern has a work function greater than that of the second work function pattern.

    Semiconductor device including a gate insulation pattern and a gate electrode pattern

    公开(公告)号:US10811408B2

    公开(公告)日:2020-10-20

    申请号:US15952798

    申请日:2018-04-13

    Abstract: A semiconductor device includes a substrate including an active region defined by a device isolation layer. A word line structure is in a trench formed in an upper portion of the substrate. The word line structure includes a gate insulation pattern covering an inner surface of the trench. A gate electrode pattern is on the gate insulation pattern. A first work function pattern is between the gate insulation pattern and the gate electrode pattern. A second work function pattern is on the first work function pattern and extends along a side surface of the gate electrode pattern. The first work function pattern has a top surface at a level below that of a bottom surface of the gate electrode pattern. The first work function pattern has a work function greater than that of the second work function pattern.

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