公开(公告)号：US20140191787A1

公开(公告)日：2014-07-10

申请号：US14108834

申请日：2013-12-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Nan XING ,  Jaejin PARK ,  Jenlung LIU ,  Tae-Kwang JANG

IPC: H03L7/089

CPC classification number: H03L7/093 ,  H03L7/0895

Abstract: A phase locked loop circuit is provided which includes a bang-bang phase frequency detector configured to receive a reference signal and a feedback signal, detect a phase difference between the reference signal and the feedback signal, output a detection signal on the based on a result of the detection; an analog-digital mixed filter configured to receive the detection signal and output a control signal on the basis of the received detection signal; a voltage controlled oscillator configured to output an output signal in response to the control signal; and a divider configured to divide the output signal by n to output as the feedback signal. The detection signal is a digital signal, and the control signal is an analog signal.

Abstract translation: 提供了一种锁相环电路，其包括一个轰击相位频率检测器，配置为接收参考信号和反馈信号，检测参考信号和反馈信号之间的相位差，基于结果输出检测信号 的检测; 模拟数字混合滤波器，被配置为接收检测信号并根据接收到的检测信号输出控制信号; 被配置为响应于所述控制信号输出输出信号的压控振荡器; 以及分频器，被配置为将输出信号除以n作为反馈信号输出。 检测信号是数字信号，控制信号是模拟信号。