公开(公告)号：US20230129921A1

公开(公告)日：2023-04-27

申请号：US17965860

申请日：2022-10-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunju KIM ,  Namsu KIM ,  Jinwon JEONG

IPC: H01L27/108

Abstract: A semiconductor device including a substrate having a cell array area, a peripheral circuit area, and a boundary area therebetween, gate electrodes in the cell array area and in a plurality of word line trenches extending to an inside of the substrate, a device isolation layer in the peripheral circuit area of the substrate and defining active areas, and a boundary structure in the boundary area and in a boundary trench extending to the inside of the substrate may be provided. The boundary structure may include a buried insulating layer on an inner wall of the boundary trench, an insulating liner on the buried insulating layer, and a gap-fill insulating layer filling an inside of the boundary trench on the insulating liner, and an upper surface of the insulating liner may be at a lower level than an upper surface of a corresponding one of the active area.