公开(公告)号：US20230276619A1

公开(公告)日：2023-08-31

申请号：US18049061

申请日：2022-10-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungmin Ju ,  Gyuhyun Kil ,  Hyebin Choi ,  Doosan Back ,  Ahrang Choi ,  Jung-Hoon Han

IPC: H01L27/108

CPC classification number: H01L27/10897 ,  H01L27/10814 ,  H01L27/10894

Abstract: A semiconductor device includes a substrate having first and second active patterns therein, which are spaced apart from each other. The first active pattern has a top surface that is elevated relative to a top surface of the second active pattern. A channel semiconductor layer is provided on the top surface of the first active pattern. A first gate pattern is provided, which includes a first insulating pattern, on the channel semiconductor layer. A second gate pattern is provided, which includes a second insulating pattern having a thickness greater than a thickness of the first insulating pattern, on the top surface of the second active pattern.