公开(公告)号：US10699983B2

公开(公告)日：2020-06-30

申请号：US16190825

申请日：2018-11-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kil-soo Kim ,  Yong-hoon Kim ,  Hyun-ki Kim ,  Kyung-suk Oh

IPC: H01L23/433 ,  H01L23/60 ,  H01L25/065 ,  H01L23/373 ,  H01L23/367 ,  H01L23/552 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor package includes a package substrate, a lower semiconductor chip on the package substrate, a heat emission member on the lower semiconductor chip, the heat emission member having a horizontal unit and a vertical unit connected to the horizontal unit, a first semiconductor chip stack and a second semiconductor chip stack on the horizontal unit, and a molding member that surrounds the lower semiconductor chip, the first and second semiconductor chip stacks, and the heat emission member. The vertical unit may be arranged between the first semiconductor chip stack and the second semiconductor chip stack, and an upper surface of the vertical unit may be exposed in the molding member.

公开(公告)号：US20200075545A1

公开(公告)日：2020-03-05

申请号：US16382376

申请日：2019-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Won-keun KIM ,  Kyung-suk Oh ,  Ji-han Ko ,  Kil-soo Kim ,  Yeong-seok Kim ,  Joung-phil Lee ,  Hwa-il Jin ,  Su-jung Hyung

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/552 ,  H01L23/367 ,  H01L25/00 ,  H01L21/56

Abstract: A semiconductor package may include a first semiconductor chip on and electrically connected to a wiring substrate, an intermediate layer on the first semiconductor chip and covering an entire surface of the first semiconductor chip, a second semiconductor chip on the intermediate layer and electrically connected to the wiring substrate, a mold layer on the wiring substrate and covering the first semiconductor chip and the second semiconductor chip, the mold layer including one or more inner surfaces defining a mold via hole that exposes a portion of a surface of the intermediate layer, an electromagnetic shielding layer on the one or more inner surfaces of the mold layer and further on one or more outer surfaces of the mold layer, and a thermal discharge layer on the electromagnetic shielding layer in the mold via hole, such that the thermal discharge layer fills the mold via hole.

公开(公告)号：US11205637B2

公开(公告)日：2021-12-21

申请号：US17009886

申请日：2020-09-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Won-keun Kim ,  Kyung-suk Oh ,  Ji-han Ko ,  Kil-soo Kim ,  Yeong-seok Kim ,  Joung-phil Lee ,  Hwa-il Jin ,  Su-jung Hyung

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/552 ,  H01L25/00

Abstract: A semiconductor package may include a first semiconductor chip on and electrically connected to a wiring substrate, an intermediate layer on the first semiconductor chip and covering an entire surface of the first semiconductor chip, a second semiconductor chip on the intermediate layer and electrically connected to the wiring substrate, a mold layer on the wiring substrate and covering the first semiconductor chip and the second semiconductor chip, the mold layer including one or more inner surfaces defining a mold via hole that exposes a portion of a surface of the intermediate layer, an electromagnetic shielding layer on the one or more inner surfaces of the mold layer and further on one or more outer surfaces of the mold layer, and a thermal discharge layer on the electromagnetic shielding layer in the mold via hole, such that the thermal discharge layer fills the mold via hole.

公开(公告)号：US11309300B2

公开(公告)日：2022-04-19

申请号：US16051926

申请日：2018-08-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kil-soo Kim

IPC: H01L25/18 ,  H01L25/065 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00

Abstract: A semiconductor package includes a package substrate, a processor chip mounted on a first region of the package substrate, a plurality of memory chips mounted on a second region of the package substrate being spaced apart from the first region of the package substrate, a signal transmission device mounted on a third region of the package substrate between the first and second regions of the package substrate, and a plurality of first bonding wires connecting the plurality of memory chips to the signal transmission device. The signal transmission device includes upper pads connected to the plurality of first bonding wires, penetrating electrodes arranged in a main body portion of the signal transmission device and connected to the upper pads, and lower pads in a lower surface portion of the signal transmission device and connected to the penetrating electrodes and connected to the package substrate via bonding balls.

公开(公告)号：US10797021B2

公开(公告)日：2020-10-06

申请号：US16382376

申请日：2019-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Won-keun Kim ,  Kyung-suk Oh ,  Ji-han Ko ,  Kil-soo Kim ,  Yeong-seok Kim ,  Joung-phil Lee ,  Hwa-il Jin ,  Su-jung Hyung

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/552 ,  H01L25/00

Abstract: A semiconductor package may include a first semiconductor chip on and electrically connected to a wiring substrate, an intermediate layer on the first semiconductor chip and covering an entire surface of the first semiconductor chip, a second semiconductor chip on the intermediate layer and electrically connected to the wiring substrate, a mold layer on the wiring substrate and covering the first semiconductor chip and the second semiconductor chip, the mold layer including one or more inner surfaces defining a mold via hole that exposes a portion of a surface of the intermediate layer, an electromagnetic shielding layer on the one or more inner surfaces of the mold layer and further on one or more outer surfaces of the mold layer, and a thermal discharge layer on the electromagnetic shielding layer in the mold via hole, such that the thermal discharge layer fills the mold via hole.

公开(公告)号：US11309280B2

公开(公告)日：2022-04-19

申请号：US16923418

申请日：2020-07-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong-hoon Kim ,  Kil-soo Kim ,  Kyung-suk Oh ,  Tae-joo Hwang

IPC: H01L25/065 ,  H01L23/552 ,  H01L23/367 ,  H04M1/02 ,  H01L23/427

Abstract: An electronic device includes a circuit board, a semiconductor device package mounted on the circuit board, the semiconductor device package including a package substrate connected to the circuit board, a first semiconductor device and a second semiconductor device mounted side by side on the package substrate, and a molding surrounding a sidewall of the first semiconductor device and a sidewall of the second semiconductor device, the molding not covering a top surface of the first semiconductor device, and a heat dissipation structure on the semiconductor device package, the top surface of the first semiconductor device being in contact with the heat dissipation structure.

公开(公告)号：US10727199B2

公开(公告)日：2020-07-28

申请号：US16002018

申请日：2018-06-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yong-hoon Kim ,  Kil-soo Kim ,  Kyung-suk Oh ,  Tae-joo Hwang

IPC: H01L25/065 ,  H01L23/552 ,  H01L23/367 ,  H04M1/02 ,  H01L23/427

Abstract: An electronic device includes a circuit board, a semiconductor device package mounted on the circuit board, the semiconductor device package including a package substrate connected to the circuit board, a first semiconductor device and a second semiconductor device mounted side by side on the package substrate, and a molding surrounding a sidewall of the first semiconductor device and a sidewall of the second semiconductor device, the molding not covering a top surface of the first semiconductor device, and a heat dissipation structure on the semiconductor device package, the top surface of the first semiconductor device being in contact with the heat dissipation structure.